Datasheet LTC7801 (Analog Devices) - 9

LTC7801
pin FuncTions (QFN/TSSOP) VFB (Pin 1/Pin 3):
Feedback Input. This pin receives the to a fixed low frequency of 350kHz. Connecting the pin remotely sensed feedback voltage from an external resistor to INTVCC forces the VCO to a fixed high frequency of divider across the output. 535kHz. Other frequencies between 50kHz and 900kHz
ITH (Pin 2/Pin 4):
Error Amplifier Output and Switching can be programmed by using a resistor between FREQ Regulator Compensation Point. The current comparator and GND. An internal 20µA pull-up current develops the trip point increases with this control voltage. voltage to be used by the VCO to control the frequency.
MODE (Pin 3/Pin 5):
Mode Select and Burst Clamp Adjust
DRVSET (Pin 9/Pin 11):
DRVCC Regulation Program Pin. Input. This input determines how the LTC7801 operates at This pin sets the regulated output voltage of the DRVCC light loads. Pulling this pin to ground selects Burst Mode linear regulator. Tying this pin to GND sets DRVCC to 6.0V. operation with the burst clamp level defaulting to 25% of Tying this pin to INTVCC sets DRVCC to 10V. Other voltages V between 5V and 10V can be programmed by placing a SENSE(MAX). Tying this pin to a voltage between 0.5V and 1.0V selects Burst Mode operation and adjusts the burst resistor (50k to 100k) between the DRVSET pin and GND. clamp between 10% and 60%. Tying this pin to INTV An internal 20µA pull-up current develops the voltage to CC forces continuous inductor current operation. Tying this pin be used as the reference to the DRVCC LDO. to a voltage greater than 1.4V and less than INTVCC – 1.3V
DRVUV (Pin 10/Pin 12):
DRVCC UVLO Program Pin. This selects pulse-skipping operation. pin determines the higher or lower DRVCC UVLO and
GND (Pin 4, Exposed Pin 25/Pin 6, Exposed Pad Pin 25):
EXTVCC switchover thresholds, as listed on the Electrical Ground. All GND pins must be tied together for operation. Characteristics table. Connecting DRVUV to GND chooses The exposed pad must be soldered to PCB ground for the lower thresholds whereas tying DRVUV to INTVCC rated electrical and thermal performance. chooses the higher thresholds. Do not float this pin.
CPUMP_EN (Pin 5/Pin 7):
Charge Pump Enable Pin for
TG (Pin 11/Pin 13):
High Current Gate Drives for Top N- the Top Gate Driver Boost Supply. Tying this pin to INTV Channel MOSFET. This is the output of floating high side CC enables the boost supply charge pump and allows for driver with a voltage swing equal to DRVCC superimposed 100% duty cycle operation in dropout. Tying this pin to on the switch node voltage SW. GND disables the charge pump and enables boost refresh,
SW (Pin 12/Pin 14):
Switch Node Connection to Inductor. allowing for 99% duty cycle operation in dropout. Do not
BOOST (Pin 13/Pin 15):
Bootstrapped Supply to the Top- float this pin. side Floating Driver. A capacitor is connected between the
PLLIN (Pin 6/ Pin 8):
External Synchronization Input to BOOST and SW pins. Voltage swing at the BOOST pin is Phase Detector. When an external clock is applied to this from approximately DRVCC to (VIN + DRVCC). pin, the phase-locked loop will force the rising TG signal
BG (Pin 14/Pin 16):
High Current Gate Drive for Bottom to be synchronized with the rising edge of the external (Synchronous) N-Channel MOSFET. Voltage swing at this clock. If the MODE pin is set to Forced Continuous Mode pin is from ground to DRV or Burst Mode operation, then the regulator operates in CC. Forced Continuous Mode when synchronized. If the MODE
DRVCC (Pin 15/Pin 17):
Output of the Internal or External pin is set to pulse-skipping mode, then the regulator oper- Low Dropout Regulators. The gate drivers are powered ates in pulse-skipping mode when synchronized. from this voltage source. The DRVCC voltage is set by the DRVSET pin. Must be decoupled to ground with a
PGOOD (Pin 7/Pin 9):
Open-Drain Logic Output. PGOOD minimum of 4.7µF ceramic or other low ESR capacitor, is pulled to ground when the voltage on the VFB pin is not as close as possible to the IC. Do not use the DRV within ±10% of its set point. CC pin for any other purpose.
FREQ (Pin 8/Pin 10):
Frequency Control Pin for the In- ternal VCO. Connecting the pin to GND forces the VCO 7801f For more information www.linear.com/LTC7801 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts