Datasheet LT1055, LT1056 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | Precision, High Speed, JFET Input Operational Amplifiers |
| Páginas / Página | 20 / 6 — ELECTRICAL CHARACTERISTICS. Note 3:. Note 1:. Note 4:. Note 5:. Note 2:. … |
| Formato / tamaño de archivo | PDF / 329 Kb |
| Idioma del documento | Inglés |
ELECTRICAL CHARACTERISTICS. Note 3:. Note 1:. Note 4:. Note 5:. Note 2:. Note 6:. TYPICAL PERFORMANCE CHARACTERISTICS
Línea de modelo para esta hoja de datos
Versión de texto del documento
LT1055/LT1056
ELECTRICAL CHARACTERISTICS
For MIL-STD components, please refer to LTC883 data sheet for test
Note 3:
10Hz noise voltage density is sample tested on every lot of A listing and parameters. grades. Devices 100% tested at 10Hz are available on request.
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
This parameter is tested on a sample basis only. may cause permanent damage to the device. Exposure to any Absolute
Note 5:
Current noise is calculated from the formula: in = (2qlB)1/2, where Maximum Rating condition for extended periods may affect device q = 1.6 • 10–19 coulomb. The noise of source resistors up to 1GΩ swamps reliability and lifetime. the contribution of current noise.
Note 2:
Offset voltage is measured under two different conditions:
Note 6:
Offset voltage drift with temperature is practically unchanged when (a) approximately 0.5 seconds after application of power; (b) at TA = 25°C the offset voltage is trimmed to zero with a 100k potentiometer between only, with the chip heated to approximately 38°C for the LT1055 and to the balance terminals and the wiper tied to V+. Devices tested to tighter 45°C for the LT1056, to account for chip temperature rise when the device drift specifications are available on request. is fully warmed up.
TYPICAL PERFORMANCE CHARACTERISTICS Input Bias and Offset Currents Input Bias Current Over the Distribution of Input Offset vs Temperature Common Mode Range Voltage (N8 Package)
1000 120 1200 V 160 S = ±15V V V S = ±15V S = ±15V 50% YIELD V INPUT BIAS CURRENT, T CM = 0V WARMED UP TA = 25°C TO ±140µV WARMED UP 80 800 140 550 UNITS 300 = 70°C (pA) T BIAS OR OFFSET CURRENTS A A = 125°C TESTED FROM T 120 MAY BE POSITIVE OR NEGATIVE A = 70°C TWO RUNS 40 400 (LT1056) 100 A 100 = 25°C, T TA = 25°C BIAS CURRENT A 0 A 0 80 30 A = 125°C (pA) 60 –40 –400 T NUMBER OF INPUTS A = 70°C TA = 125°C 40 10 B –800 OFFSET CURRENT –80 20 INPUT BIAS AND OFFSET CURRENT (pA) A = POSITIVE INPUT CURRENT B B = NEGATIVE INPUT CURRENT 3 INPUT BIAS CURRENT, T –120 –1200 0 0 25 50 75 100 125 –15 –10 –5 0 5 10 15 –800 –600 –400 –200 0 200 400 600 800 AMBIENT TEMPERATURE (°C) COMMON MODE INPUT VOLTAGE (V) INPUT OFFSET VOLTAGE (µV) LT1055/56 G01 LT1055/56 G02 LT1055/56 G03
Distribution of Offset Voltage Drift Long Term Drift of with Temperature (H Package)* Warm-Up Drift Representative Units
140 100 50 VS = ±15V 50% TO V VS = ±15V 634 UNITS TESTED ±1.5µV/°C S = ±15V 40 120 T TA = 25°C FROM THREE RUNS A = 25°C 80 30 100 20 60 10 80 LT1056CN8 0 60 40 –10 LT1055CN8 –20 BATTERY VOLTAGE (V) 40 20 LT1056 H PACKAGE OFFSET VOLTAGE CHANGE (µV) –30 20 CHANGE IN OFFSET VOLTAGE (µV) LT1055 H PACKAGE –40 0 0 –50 –10 –8 –6 –4 –2 0 2 4 6 8 10 0 1 2 3 4 5 0 1 2 3 4 5 OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) TIME AFTER POWER ON (MINUTES) TIME (MONTHS) *DISTRIBUTION IN THE PLASTIC (N8) PACKAGE LT1055/56 G05 LT1055/56 GO6 IS SIGNIFICANTLY WIDER. LT1055/56 G04 10556fd 6 For more information www.linear.com/LT1055 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Applications Information Typical Applications Simplified schematic Package Description Revision History Typical Application Related Parts
ELECTRICAL CHARACTERISTICS
For MIL-STD components, please refer to LTC883 data sheet for test
Note 3:
10Hz noise voltage density is sample tested on every lot of A listing and parameters. grades. Devices 100% tested at 10Hz are available on request.
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
This parameter is tested on a sample basis only. may cause permanent damage to the device. Exposure to any Absolute
Note 5:
Current noise is calculated from the formula: in = (2qlB)1/2, where Maximum Rating condition for extended periods may affect device q = 1.6 • 10–19 coulomb. The noise of source resistors up to 1GΩ swamps reliability and lifetime. the contribution of current noise.
Note 2:
Offset voltage is measured under two different conditions:
Note 6:
Offset voltage drift with temperature is practically unchanged when (a) approximately 0.5 seconds after application of power; (b) at TA = 25°C the offset voltage is trimmed to zero with a 100k potentiometer between only, with the chip heated to approximately 38°C for the LT1055 and to the balance terminals and the wiper tied to V+. Devices tested to tighter 45°C for the LT1056, to account for chip temperature rise when the device drift specifications are available on request. is fully warmed up.
TYPICAL PERFORMANCE CHARACTERISTICS Input Bias and Offset Currents Input Bias Current Over the Distribution of Input Offset vs Temperature Common Mode Range Voltage (N8 Package)
1000 120 1200 V 160 S = ±15V V V S = ±15V S = ±15V 50% YIELD V INPUT BIAS CURRENT, T CM = 0V WARMED UP TA = 25°C TO ±140µV WARMED UP 80 800 140 550 UNITS 300 = 70°C (pA) T BIAS OR OFFSET CURRENTS A A = 125°C TESTED FROM T 120 MAY BE POSITIVE OR NEGATIVE A = 70°C TWO RUNS 40 400 (LT1056) 100 A 100 = 25°C, T TA = 25°C BIAS CURRENT A 0 A 0 80 30 A = 125°C (pA) 60 –40 –400 T NUMBER OF INPUTS A = 70°C TA = 125°C 40 10 B –800 OFFSET CURRENT –80 20 INPUT BIAS AND OFFSET CURRENT (pA) A = POSITIVE INPUT CURRENT B B = NEGATIVE INPUT CURRENT 3 INPUT BIAS CURRENT, T –120 –1200 0 0 25 50 75 100 125 –15 –10 –5 0 5 10 15 –800 –600 –400 –200 0 200 400 600 800 AMBIENT TEMPERATURE (°C) COMMON MODE INPUT VOLTAGE (V) INPUT OFFSET VOLTAGE (µV) LT1055/56 G01 LT1055/56 G02 LT1055/56 G03
Distribution of Offset Voltage Drift Long Term Drift of with Temperature (H Package)* Warm-Up Drift Representative Units
140 100 50 VS = ±15V 50% TO V VS = ±15V 634 UNITS TESTED ±1.5µV/°C S = ±15V 40 120 T TA = 25°C FROM THREE RUNS A = 25°C 80 30 100 20 60 10 80 LT1056CN8 0 60 40 –10 LT1055CN8 –20 BATTERY VOLTAGE (V) 40 20 LT1056 H PACKAGE OFFSET VOLTAGE CHANGE (µV) –30 20 CHANGE IN OFFSET VOLTAGE (µV) LT1055 H PACKAGE –40 0 0 –50 –10 –8 –6 –4 –2 0 2 4 6 8 10 0 1 2 3 4 5 0 1 2 3 4 5 OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) TIME AFTER POWER ON (MINUTES) TIME (MONTHS) *DISTRIBUTION IN THE PLASTIC (N8) PACKAGE LT1055/56 G05 LT1055/56 GO6 IS SIGNIFICANTLY WIDER. LT1055/56 G04 10556fd 6 For more information www.linear.com/LT1055 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Applications Information Typical Applications Simplified schematic Package Description Revision History Typical Application Related Parts