Datasheet LTC6268, LTC6269 (Analog Devices) - 6

FabricanteAnalog Devices
DescripciónDual 500MHz Ultra-Low Bias Current FET Input Op Amp
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3.3. V ELECTRICAL CHARACTERISTICS The. denotes specifications that apply over the full operating

3.3 V ELECTRICAL CHARACTERISTICS The denotes specifications that apply over the full operating

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LTC6268/LTC6269
3.3 V ELECTRICAL CHARACTERISTICS The
l
denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VSUPPLY = 3.3V (V+ = 3.3V, V– = 0V, VCM = mid-supply) RL = 1kΩ, CL = 10pF, VSHDN is unconnected. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Current in Shutdown 0.23 0.6 mA (Per Amplifier) l 0.8 mA ISHDN Shutdown Pin Current VSHDN = 0.75V l –12 2 12 µA VSHDN = 1.5V l –12 2 12 µA VIL SHDN Input Low Voltage Disable l 0.75 V VIH SHDN Input High Voltage Enable. If SHDN is Unconnected, Amp Is Enabled l 1.5 V tON Turn On Time, Delay from SHDN Toggle SHDN Toggle from 0V to 2V 710 ns to Output Reaching 90% of Target tOFF Turn Off Time, Delay from SHDN Toggle SHDN Toggle from 2V to 0V 620 ns to Output High Z BW –3dB Closed Loop Bandwidth AV = 1 350 MHz GBW Gain-Bandwidth Product f = 10MHz 370 420 MHz SR+ Slew Rate+ AV = 6 (RF = 499, RG = 100), VOUT = 0.5V to 2.8V, Measured 20% to 80%, 300 400 V/µs CLOAD = 10pF l 200 V/µs SR– Slew Rate– AV = 6 (RF = 499, RG = 100), VOUT = 2.8V to 0.5V, Measured 80% to 20%, 180 260 V/µs CLOAD = 10pF l 130 V/µs FPBW Full Power Bandwidth (Note 7) 2VP-P 40 MHz HD Harmonic Distortion(HD2/HD3) A = 1, 10MHz. 1VP-P, VCM = 1.65V, RL = 1k –81/–90 dB THD+N Total Harmonic Distortion and Noise A = 1, 10MHz. 1VP-P, VCM = 1.65V, RL = 1k 0.01 % –78 dB
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
Thermal resistance varies with the amount of PC board metal may cause permanent damage to the device. Exposure to any Absolute connected to the package. The specified values are for short traces Maximum Rating condition for extended periods may affect device connected to the leads. reliability and lifetime.
Note 6:
The input bias current is the average of the currents into the
Note 2:
The inputs are protected by two series connected ESD protection positive and negative input pins. Typical measurement is for S8 package. diodes to each power supply. The input current should be limited to less
Note 7:
Full Power Bandwidth is calculated from slew rate using the than 1mA. The input voltage should not exceed 200mV beyond the power following equation: FPBW = SR/(2π • VPEAK) supply.
Note 8:
This parameter is specified by design and/or characterization and
Note 3:
A heat sink may be required to keep the junction temperature is not tested in production. below the absolute maximum rating when the output is shorted
Note 9:
The LTC6268/LTC6269 is capable of producing peak output indefinitely. currents in excess of 135mA. Current density limitations within the
Note 4:
The LTC6268I/LTC6269I is guaranteed to meet specified IC require the continuous current supplied by the output (sourcing or performance from –40°C to 85°C. The LTC6268H/LTC6269H is guaranteed sinking) over the operating lifetime of the part be limited to under 135mA to meet specified performance from –40°C to 125°C. (Absolute Maximum). 62689f 6 For more information www.linear.com/LTC6268