link to page 8 link to page 11 link to page 14 Data SheetADE7763ParameterSpecUnitTest Conditions/Comments REFERENCE INPUT REFIN/OUT Input Voltage Range 2.6 V max 2.4 V + 8% 2.2 V min 2.4 V – 8% Input Capacitance 10 pF max ON-CHIP REFERENCE Nominal 2.4 V at REFIN/OUT pin Reference Error ±200 mV max Current Source 10 µA max Output Impedance 3.4 kΩ min Temperature Coefficient 30 ppm/°C typ CLKIN All specifications CLKIN of 3.579545 MHz Input Clock Frequency 4 MHz max 1 MHz min LOGIC INPUTS RESET, DIN, SCLK, CLKIN, and CS Input High Voltage, VINH 2.4 V min DVDD = 5 V ± 10% Input Low Voltage, VINL 0.8 V max DVDD = 5 V ± 10% Input Current, IIN ±3 µA max Typically 10 nA, VIN = 0 V to DVDD Input Capacitance, CIN 10 pF max LOGIC OUTPUTS SAG and IRQ Open-drain outputs, 10 kΩ pull-up resistor Output High Voltage, VOH 4 V min ISOURCE = 5 mA Output Low Voltage, VOL 0.4 V max ISINK = 0.8 mA ZX and DOUT Output High Voltage, VOH 4 V min ISOURCE = 5 mA Output Low Voltage, VOL 0.4 V max ISINK = 0.8 mA CF Output High Voltage, VOH 4 V min ISOURCE = 5 mA Output Low Voltage, VOL 1 V max ISINK = 7 mA POWER SUPPLY For specified performance AVDD 4.75 V min 5 V – 5% 5.25 V max 5 V + 5% DVDD 4.75 V min 5 V – 5% 5.25 V max 5 V + 5% AIDD 3 mA max Typically 2.0 mA DIDD 4 mA max Typically 3.0 mA 1 See the Terminology section for explanation of specifications. 2 See the plots in the Typical Performance Characteristics section. 3 See the Analog Inputs section. 200 µ AIOlTOOUTPUT+2.1VCLPIN50pF1.6mAIOH 04481-A-002 Figure 2. Load Circuit for Timing Specifications Rev. C | Page 5 of 56 Document Outline Features General Description Functional Block Diagram Revision History Specifications Timing Characteristics Absolute Maximum Ratings ESD Caution Terminology Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Analog Inputs di/dt Current Sensor and Digital Integrator Zero-Crossing Detection Zero-Crossing Timeout Period Measurement Power Supply Monitor Line Voltage Sag Detection Sag Level Set Peak Detection Peak Level Set Peak Level Record Interrupts Using Interrupts with an MCU Interrupt Timing Temperature Measurement Analog-to-Digital Conversion Antialias Filter ADC Transfer Function Reference Circuit Channel 1 ADC Channel 1 Sampling Channel 1 RMS Calculation Channel 1 RMS Offset Compensation Channel 2 ADC Channel 2 Sampling Channel 2 RMS Calculation Channel 2 RMS Offset Compensation Phase Compensation Active Power Calculation Energy Calculation Integration Time under Steady Load Power Offset Calibration Energy-to-Frequency Conversion Line Cycle Energy Accumulation Mode Positive-Only Accumulation Mode No-Load Threshold Apparent Power Calculation Apparent Power Offset Calibration Apparent Energy Calculation Integration Times under Steady Load Line Apparent Energy Accumulation Energies Scaling Calibrating an Energy Meter Watt Gain Calibrating Watt Gain Using a Reference Meter Example Calibrating Watt Gain Using an Accurate Source Example Watt Offset Calibrating Watt Offset Using a Reference Meter Example Calibrating Watt Offset with an Accurate Source Example Phase Calibration Calibrating Phase Using a Reference Meter Example Calibrating Phase with an Accurate Source Example VRMS and IRMS Calibration Apparent Energy CLKIN Frequency Suspending Functionality Checksum Register Serial Interface ADE7763 Serial Write Operation Serial Read Operation Registers Register Descriptions Communication Register Mode Register (0x09) Outline Dimensions Ordering Guide CH1OS Register (0x0D) Outline Dimensions Ordering Guide