Datasheet LTC4040 (Analog Devices) - 10

LTC4040
pin FuncTions VSYS (Pins 1, 24):
System Voltage Output Pin. This pin
CHRG (Pin 8):
Open-Drain Charge Status Output; typi- is used to provide power to an external load from either cally pulled up through a resistor to a reference voltage. the primary input supply or the backup battery if the pri- During a battery charging cycle, CHRG is pulled low until mary input supply is not available. In addition to supplying the charge current drops below C/8 when the CHRG pin power to the load, this pin provides power to charge the becomes high impedance. battery when input power is available. VSYS should be
FAULT (Pin 9):
Open-Drain Fault Status Output; typically bypassed with a low ESR ceramic capacitor of at least pulled up through a resistor to a reference voltage. This 100µF to GND. pin indicates charge cycle fault conditions during a bat-
PROG (Pin 2):
Charge Current Program Pin. An external tery charging cycle. A temperature fault or a bad-battery resistor from the PROG pin to ground programs the full- fault causes this pin to be pul ed low. If no fault conditions scale charge current. At full scale, the PROG pin servos exist, the FAULT pin remains high impedance. to 0.8V. The ratio of BAT pin current to PROG pin current
RSTFB (Pin 10):
Reset Comparator Input. High Impedance is internally set to 2500. input to an accurate comparator with a 0.74V falling
CLPROG (Pin 3):
VSYS Current Monitoring Pin. The ratio threshold and 20mV hysteresis. This pin controls the state between the CLPROG pin voltage and the differential volt- of the RST output pin. An external resistor divider is used age between VIN and CLN is internally set to 32. Charge between VSYS, RSTFB and GND. It can be the same resis- current is reduced when the CLPROG pin voltage reaches tor divider as the BSTFB divider to monitor the system 0.8V. output voltage VSYS. See the Applications Information
CHGOFF (Pin 4):
Disable Pin for the Battery Charger. Tie section. this pin to GND to enable the charger or to a voltage above
RST (Pin 11):
Open-Drain Status Output of the Reset 1.2V to disable it. Do not leave this pin unconnected. Comparator. This pin is pulled to ground by an internal
BSTOFF (Pin 5):
Disable Pin for the Backup Boost N-channel MOSFET whenever the RSTFB pin falls below Converter. Tie this pin to GND to enable the boost backup 0.74V. Once the RSTFB pin voltage recovers, the pin or to a voltage above 1.2V to disable backup. Do not leave becomes high impedance after a 232ms delay. this pin unconnected.
F2 (Pin 12):
Logic Input to Select Battery Chemistry. A
V
logic high on this pin selects Li-Ion and a logic low selects
IN (Pin 6):
Input Pin. Power can be applied directly to this pin if the optional overvoltage protection (OVP) fea- LiFePO4. Do not leave this pin unconnected. ture is not used. For applications where the OVP feature
F1, F0 (Pins 13, 14):
Logic inputs to select one of the four is required, connect an external N-channel FET between possible charge voltage settings for each battery chemis- the power supply output VPWR and this pin. try. Do not leave these pins unconnected.
CLN (Pin 7):
Negative terminal pin for an external cur-
F0 F1 F2 = 1: Li-Ion (V) F2 = 0: LiFePO4 (V)
rent limit sense resistor connected between VIN and this 0 0 3.95 3.45 pin. This resistor is used to monitor the current from 1 0 4.00 3.50 VIN to VSYS. The LT4040 reduces charge current in order 0 1 4.05 3.55 to maintain 25mV across this sense resistor. However, 1 1 4.10 3.60 it does not limit the system current if the drop exceeds 25mV. 4040fb 10 For more information www.linear.com/LTC4040 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Package Description Revision History Typical Application Related Parts