Datasheet LTM4603, LTM4603-1 (Analog Devices) - 10

LTM4603/LTM4603-1
operation Power Module Description
off and bottom FET Q2 is turned on and held on until the The LTM4603 is a standalone nonisolated switching mode overvoltage condition clears. DC/DC power supply. It can deliver up to 6A of DC output Pulling the RUN pin below 1V forces the controller into its current with few external input and output capacitors. shutdown state, turning off both Q1 and Q2. At low load This module provides precisely regulated output voltage current, the module works in continuous current mode by programmable via one external resistor from 0.6VDC to default to achieve minimum output ripple voltage. 5.0VDC over a 4.5V to 20V wide input voltage. The typical When DRV application schematic is shown in Figure 18. CC pin is connected to INTVCC an integrated 5V linear regulator powers the internal gate drivers. If a The LTM4603 has an integrated constant on-time current 5V external bias supply is applied on the DRVCC pin, then mode regulator, ultralow RDS(ON) FETs with fast switching an efficiency improvement will occur due to the reduced speed and integrated Schottky diodes. The typical switching power loss in the internal linear regulator. This is especially frequency is 1MHz at full load. With current mode control true at the high end of the input voltage range. and internal feedback loop compensation, the LTM4603 The LTM4603 has a very accurate differential remote module has sufficient stability margins and good transient sense amplifier with very low offset. This provides for performance under a wide range of operating conditions very accurate output voltage measurement at the load. and with a wide range of output capacitors, even all ceramic The MPGM pin, MARG0 pin and MARG1 pin are used to output capacitors. support voltage margining, where the percentage of margin Current mode control provides cycle-by-cycle fast current is programmed by the MPGM pin, and the MARG0 and limit. Besides, foldback current limiting is provided in an MARG1 select margining. overcurrent condition while VFB drops. Internal overvolt- The PLLIN pin provides frequency synchronization of the age and undervoltage comparators pull the open-drain device to an external clock. The TRACK/SS pin is used PGOOD output low if the output feedback voltage exits a for power supply tracking and soft-start programming. ±10% window around the regulation point. Furthermore, in an overvoltage condition, internal top FET Q1 is turned 4603fb 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Application Package Description Revision History Typical Application Package Photograph Related Parts