Datasheet LTM4618 (Analog Devices) - 7

LTM4618
pin FuncTions NC (A1):
No Connect. Leave floating.
RUN (B2):
Run Control Pin. A voltage above 1.35V on
FREQ (A2):
Frequency Selection Pin. An internal low pass this pin turns on the module. Forcing this pin below 1.1V filter is tied to this pin. The frequency can be selected with will shut down the output. The RUN pin has a 1µA pull- a voltage from this pin to SGND. A programming resistor up current source that increases to 10µA as the RUN pin divider can be used to set the operating frequency. The voltage reaches 1.5V and up to compliance. Therefore the suggested operating frequency range is 400kHz to 780kHz. pin can be left floating for normal operation. A maximum Operating frequencies as low as 250kHz are possible af- of 6V can be applied to the pin. A voltage divider can be ter evaluating the inductor ripple current for the desired used for a UVLO function. See the Applications Informa- configuration. See the Applications Information section. tion section.
MODE/PLLIN (A3):
Mode Selection or External Synchroni-
SGND (B3, C2 and C3):
Signal Ground Pin. Return ground zation Pin. Tying this pin to INTV path for all analog and low power circuitry. Tie a single CC enables pulse-skipping operation. Tying this pin low enables forced continuous connection to PGND. See Figure 1 and Applications mode operation. Burst Mode operation is enabled by float- Information section for details. ing the pin. A clock on the pin will force the controller into
COMP (C1):
Current control threshold and error ampli- forced continuous mode of operation and synchronize to fier compensation point. The module has been internally the internal oscillator. The programming DC voltage has compensated for most I/O ranges. to be removed for clock synchronization.
EXTVCC (C4):
External Voltage Input. Bypasses the internal
PGND (BANK 2: A4, B4, D4-D7, E1-E7, F1-F7, G1-G7,
INTVCC LDO and powers the internal circuitry and MOSFET
H1-H7, J5-J7, K5, K7, L5-L7, M5-M7):
Power ground drivers. If a 5V source is available, the internal LDO is pins for both input and output returns. disabled, and the power dissipation is lower, especially at
V
higher input voltages. See the Applications Information
IN (BANK 1: A5-A7, B5-B7, C5-C7):
Power Input Pins. Apply input voltage between these pins and PGND pins. section. Recommend placing input decoupling capacitance directly
VFB (D1):
The negative input of the error amplifier. Inter- between VIN pins and PGND pins. nally, this pin is connected to VOUT with a 60.4kΩ precision
TK/SS (B1):
Output Voltage Tracking and Soft-Start Pin. An resistor. Different output voltages can be programmed with internal soft-start current of 1.3µA charges the soft-start an additional resistor between VFB and SGND pins. See capacitor. See the Applications Information section. Applications Information section for details. 7 BANK 2 BANK 1 PGND V 6 IN SW 5 SGND/PGND 4 3 BANK 3 2 VOUT CNTRL 1 A B C D E F G H J K L M
Figure 1. LGA Package
4618fb For more information www.linear.com/LTM4618 7 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Photograph Package Description Revision History Typical Application Related Parts