Datasheet AD680 (Analog Devices) - 8

FabricanteAnalog Devices
DescripciónBandgap, Low Power 2.5v Reference
Páginas / Página12 / 8 — AD680. +VIN. TEMPERATURE PERFORMANCE. VOUT. 0.1. CL 1000pF. 249. OUT. …
RevisiónH
Formato / tamaño de archivoPDF / 402 Kb
Idioma del documentoInglés

AD680. +VIN. TEMPERATURE PERFORMANCE. VOUT. 0.1. CL 1000pF. 249. OUT. 5mV. 100. 2.501. SLOPE = TC. VMAX – VMIN. (TMAX – TMIN). 2.5V. 10–6. 2.500

AD680 +VIN TEMPERATURE PERFORMANCE VOUT 0.1 CL 1000pF 249 OUT 5mV 100 2.501 SLOPE = TC VMAX – VMIN (TMAX – TMIN) 2.5V 10–6 2.500

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AD680 +VIN TEMPERATURE PERFORMANCE
The AD680 is designed for reference applications where tem-
VOUT 0.1
μ
F AD680 VOUT
perature performance is important. Extensive temperature
CL 1000pF 249
Ω testing and characterization ensure that the device’s performance is maintained over the specified temperature range.
V V OUT L 0V
00813-012 Some confusion exists in the area of defining and specifying Figure 12. Capacitive Load Transient Response Test Circuit reference voltage error over temperature. Historically, references have been characterized using a maximum deviation per degree centigrade, that is, ppm/°C. However, because of nonlinearities Figure 13 displays the output amplifier characteristics driving a in temperature characteristics that originated in standard Zener 1,000 pF, 0 mA to 10 mA load. references (such as “S” type characteristics), most manufac- turers now use a maximum limit error band approach to specify devices. This technique involves measuring the output at three
2V 5mV 5
μ
s
or more different temperatures to specify an output voltage
100 V
error band.
L 90 2.501 SLOPE = TC VMAX – VMIN V = OUT (TMAX – TMIN)
×
2.5V
×
10–6 2.500 2.501 – 2.498 = (85
°
C – (–40
°
C))
×
2.5V
×
10–6 LTS (V) 2.499 = 9.6ppm/
°
C VO 10 0% 2.498
00813-013 Figure 13. Output Response with Capacitive Load 015
–50 –30 –10 0 20 40 60 80 100 LOAD REGULATION TEMPERATURE (
°
C)
00813- Figure 15. Typical AD680AN/AD680AR Temperature Drift Figure 14 depicts the load regulation characteristics of the AD680. Figure 15 shows a typical output voltage drift for the AD680AN/ AD680AR and illustrates the test methodology. The box in
1V 1mV 100
μ
s
Figure 15 is bounded on the left and right sides by the operat-
100
ing temperature extremes, and on the top and bottom by the
VL 90
maximum and minimum output voltages measured over the operating temperature range. The maximum height of the box for the appropriate temperature
VOUT
range and device grade is shown in Table 4. Duplication of these results requires a combination of high accuracy and stable tem- perature control in a test system. Evaluation of the AD680 will produce a curve similar to that in Figure 15, but output readings
10
could vary depending upon the test equipment used.
0%
00813-014
Table 4. Maximum Output Change in mV
Figure 14. Typical Load Regulation Characteristics
Maximum Output Change (mV) Device Grade 0°C to 70°C −40°C to +85°C
AD680JN/AD680JR 4.375 Not applicable AD680JT 5.250 Not applicable AD680AN Not applicable 6.250 Rev. H | Page 8 of 12 Document Outline FEATURES GENERAL DESCRIPTION CONNECTION DIAGRAMS PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS OUTPUT PROTECTION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS THEORY OF OPERATION APPLYING THE AD680 NOISE PERFORMANCE TURN-ON TIME DYNAMIC PERFORMANCE LOAD REGULATION TEMPERATURE PERFORMANCE TEMPERATURE OUTPUT PIN DIFFERENTIAL TEMPERATURE TRANSDUCER LOW POWER, LOW VOLTAGE REFERENCE FOR DATA CONVERTERS 4.5 V REFERENCE FROM A 5 V SUPPLY VOLTAGE REGULATOR FOR PORTABLE EQUIPMENT OUTLINE DIMENSIONS ORDERING GUIDE