Datasheet ADR225 (Analog Devices) - 4
| Fabricante | Analog Devices |
| Descripción | High Temperature, Low Drift, Micropower, 2.5V Reference |
| Páginas / Página | 12 / 4 — ADR225. Data Sheet. ABSOLUTE MAXIMUM RATINGS. 100k. Table 2. Parameter. … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 243 Kb |
| Idioma del documento | Inglés |
ADR225. Data Sheet. ABSOLUTE MAXIMUM RATINGS. 100k. Table 2. Parameter. Rating. 10k. our. ( E. TIM. LIFE. 100. IC D. E R P. 120. 130. 140. 150. 160. 170. 180
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ADR225 Data Sheet ABSOLUTE MAXIMUM RATINGS 100k Table 2. Parameter Rating ) 10k
Supply Voltage −0.3 V to +18 V
s our
OUTPUT to GND −0.3 V to V
H
S + 0.3 V
( E
Storage Temperature Range −65°C to +150°C
1k TIM
Operating Temperature Range
LIFE
8-Lead SOIC −40°C to +175°C
D 100 TE
8-Lead FLATPACK −40°C to +210°C
IC D
Junction Temperature Range
E R P 10
8-Lead SOIC −40°C to +200°C 8-Lead FLATPACK −40°C to +245°C Lead Temperature (Soldering 60 sec) 300°C
1 120 130 140 150 160 170 180 190 200 210
021 Stresses above those listed under Absolute Maximum Ratings
OPERATING TEMPERATURE (°C)
11525- may cause permanent damage to the device. This is a stress Figure 2. Predicted Lifetime vs. Operating Temperature rating only; functional operation of the device at these or any
THERMAL RESISTANCE
other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute θJA is specified for worst-case conditions; that is, θJA is specified maximum rating conditions for extended periods may affect for the device soldered in the circuit board. device reliability.
Table 3. PREDICTED LIFETIME vs. OPERATING Package Type θJA θJC Unit TEMPERATURE
8-Lead SOIC 121 43 °C/W Comprehensive reliability testing is performed on the ADR225. 8-Lead FLATPACK 100 15 °C/W Product lifetimes at extended operating temperature are obtained using high temperature operating life (HTOL). Lifetimes are
ESD CAUTION
predicted from the Arrhenius equation, taking into account potential design and manufacturing failure mechanism assumptions. HTOL is performed to JEDEC JESD22-A108. A minimum of three wafer fab and assembly lots are processed through HTOL at the maximum operating temperature. Comprehensive reliability testing is performed on all Analog Devices, Inc., high temperature (HT) products. Rev. B | Page 4 of 12 Document Outline Features Applications Pin Configuration General Description Table of Contents Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Predicted Lifetime vs. Operating Temperature Thermal Resistance ESD Caution Typical Performance Characteristics Theory of Operation Basic Voltage Reference Connections Outline Dimensions Ordering Guide
Supply Voltage −0.3 V to +18 V
s our
OUTPUT to GND −0.3 V to V
H
S + 0.3 V
( E
Storage Temperature Range −65°C to +150°C
1k TIM
Operating Temperature Range
LIFE
8-Lead SOIC −40°C to +175°C
D 100 TE
8-Lead FLATPACK −40°C to +210°C
IC D
Junction Temperature Range
E R P 10
8-Lead SOIC −40°C to +200°C 8-Lead FLATPACK −40°C to +245°C Lead Temperature (Soldering 60 sec) 300°C
1 120 130 140 150 160 170 180 190 200 210
021 Stresses above those listed under Absolute Maximum Ratings
OPERATING TEMPERATURE (°C)
11525- may cause permanent damage to the device. This is a stress Figure 2. Predicted Lifetime vs. Operating Temperature rating only; functional operation of the device at these or any
THERMAL RESISTANCE
other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute θJA is specified for worst-case conditions; that is, θJA is specified maximum rating conditions for extended periods may affect for the device soldered in the circuit board. device reliability.
Table 3. PREDICTED LIFETIME vs. OPERATING Package Type θJA θJC Unit TEMPERATURE
8-Lead SOIC 121 43 °C/W Comprehensive reliability testing is performed on the ADR225. 8-Lead FLATPACK 100 15 °C/W Product lifetimes at extended operating temperature are obtained using high temperature operating life (HTOL). Lifetimes are
ESD CAUTION
predicted from the Arrhenius equation, taking into account potential design and manufacturing failure mechanism assumptions. HTOL is performed to JEDEC JESD22-A108. A minimum of three wafer fab and assembly lots are processed through HTOL at the maximum operating temperature. Comprehensive reliability testing is performed on all Analog Devices, Inc., high temperature (HT) products. Rev. B | Page 4 of 12 Document Outline Features Applications Pin Configuration General Description Table of Contents Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Predicted Lifetime vs. Operating Temperature Thermal Resistance ESD Caution Typical Performance Characteristics Theory of Operation Basic Voltage Reference Connections Outline Dimensions Ordering Guide