Datasheet AT90S2323, AT90LS2323, AT90S2343, AT90LS2343 (Atmel) - 3

AT90S/LS2323/2343
Figure 2. The AT90S/LS2323 Block Diagram
VCC
8-BIT DATA BUS
INTERNAL
OSCILLATOR
GND
PROGRAM
COUNTER STACK
POINTER WATCHDOG
TIMER PROGRAM
FLASH SRAM MCU CONTROL
REGISTER INSTRUCTION
REGISTER INSTRUCTION
DECODER CONTROL
LINES TIMING AND
CONTROL RESET TIMER/
COUNTER GENERAL
PURPOSE
REGISTERS
X
Y
Z INTERRUPT
UNIT ALU EEPROM STATUS
REGISTER PROGRAMMING
LOGIC SPI OSCILLATOR DATA REGISTER
PORTB DATA DIR.
REG. PORTB PORTB DRIVERS PB0 -PB2 The AT90S2323/2343 provides the following features: 2K bytes of In-System Programmabl e Flash, 128 bytes EEPROM, 128 bytes SRAM, 3 (A T90S/LS2323)/5
(AT90S/LS2343) general-purpose I/O lines, 32 general-purpose working registers, an 8bit timer/counter, internal and external interrupts, programmable Watchdog Timer with
internal oscillator, an SPI serial port for Flash Memory downloading and two softwareselectable power-saving modes. The Idle mode stops the CPU while allowing the
SRAM, timer/counters, SPI port and interrupt system to continue functioning. The
Power-down mode saves the register contents but freezes the oscillator, disabling all
other chip functions until the next interrupt or hardware reset.
The device is manufactured using Atmel’s high-density nonvolatile memory technology.
The On-chip Flash allows the program memory to be reprogrammed in-system through
an SPI serial interface. By combining an 8-bit RISC CPU with ISP Flash on a monolithic 3
1004D–09/01