Datasheet ATtiny22, ATtiny22L - Preliminary (Atmel)

Features
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Utilizes the AVR® RISC Architecture
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AVR - High-performance and Low-power RISC Architecture – 118 Powerful Instructions - Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 8 MIPS Throughput at 8 MHz
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Data and Nonvolatile Program Memory – 2K Bytes of In-System Programmable Flash Endurance 1,000 Write/Erase Cycles – 128 Bytes of internal SRAM – 128 Bytes of In-System Programmable EEPROM 8-bit Endurance: 100,000 Write/Erase Cycles – Programming Lock for Flash Program and EEPROM Data Security Microcontroller
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Peripheral Features – One 8-bit Timer/Counter with Separate Prescaler with 2K Bytes of – Programmable Watchdog Timer with On-chip Oscillator – SPI Serial Interface for In-System Programming
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Special Microcontroller Features In-System – Low-power Idle and Power Down Modes – External and Internal Interrupt Sources Programmable – Power-on Reset Circuit – Selectable On-chip RC Oscillator Flash
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Specifications – Low-power, High-speed CMOS Process Technology – Fully Static Operation
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Power Consumption at 4 MHz, 3V, 25°C ATtiny22 – Active: 2.4 mA – Idle Mode: 0.5 mA ATtiny22L – Power Down Mode: <1 µA
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I/O and Packages – 5 Programmable I/O Lines – 8-pin PDIP and SOIC
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Preliminary Operating Voltages – 2.7 - 6.0V (ATtiny22L) – 4.0 - 6.0V (ATtiny22)
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Speed Grades – 0 - 4 MHz (ATtiny22L) – 0 - 8 MHz (ATtiny22) Description
The ATtiny22/L is a low-power CMOS 8-bit microcontrollers based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny22/L achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
Pin Configuration
PDIP/SOIC RESET 1 8 VCC (CLOCK) PB3 2 7 PB2 (SCK/T0) PB4 3 6 PB1 (MISO/INT0) GND 4 5 PB0 (MOSI) Rev. 1273A–04/99
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Document Outline Features Description Block Diagram Pin Descriptions ATtiny22/L VCC GND Port B (PB4..PB0) RESET CLOCK Clock Options External Clock Architectural Overview General Purpose Register File X-Register, Y-Register, and Z-Register ALU - Arithmetic Logic Unit In-System Programmable Flash Program Memory EEPROM Data Memory SRAM Data Memory Program and Data Addressing Modes Register Direct, Single Register Rd Register Direct, Two Registers Rd and Rr I/O Direct Data Direct Data Indirect with Displacement Data Indirect Data Indirect With Pre-Decrement Data Indirect With Post-Increment Constant Addressing Using the LPM Instruction Indirect Program Addressing, IJMP and ICALL Relative Program Addressing, RJMP and RCALL Memory Access and Instruction Execution Timing I/O Memory Status Register - SREG Stack Pointer - SPL Reset and Interrupt Handling Reset Sources Power-On Reset External Reset Watchdog Reset MCU Status Register - MCUSR Interrupt Handling General Interrupt Mask Register - GIMSK General Interrupt Flag Register - GIFR Timer/Counter Interrupt Mask Register - TIMSK Timer/Counter Interrupt FLAG Register - TIFR External Interrupt Interrupt Response Time MCU Control Register - MCUCR Sleep Modes Idle Mode Power Down Mode Timer/Counter Timer/Counter Prescaler 8-Bit Timer/Counter0 Timer/Counter0 Control Register - TCCR0 Timer Counter 0 - TCNT0 Watchdog Timer Watchdog Timer Control Register - WDTCR EEPROM Read/Write Access EEPROM Address Register - EEAR EEPROM Data Register - EEDR EEPROM Control Register - EECR Prevent EEPROM Corruption I/O Port B Port B Data Register - PORTB Port B Data Direction Register - DDRB Port B Input Pins Address - PINB General Digital I/O Alternate Functions of Port B CLOCK - Port B, Bit 3 SCK/T0 - Port B, Bit 2 MISO - Port B, Bit 1 MOSI - Port B, Bit 0 Memory Programming Program and Data Memory Lock Bits Fuse Bits Signature Bytes Programming the Flash and EEPROM High-Voltage Serial Programming High-Voltage Serial Programming Algorithm High-Voltage Serial Programming Characteristics Low-Voltage Serial Downloading Low-Voltage Serial Programming Algorithm Data Polling EEPROM Data Polling Flash Low-Voltage Serial Programming Characteristics Electrical Characteristics Absolute Maximum Ratings* DC Characteristics External Clock Drive Waveforms External Clock Drive Typical characteristics Register Summary Instruction Set Summary (Continued) Ordering Information