Features • High-performance, Low-power AVR ® 8-bit Microcontroller– 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 8 MIPS Throughput at 8 MHz – On-chip 2-cycle Multiplier • Nonvolatile Program and Data Memories • Self-programming In-System Programmable Flash Memory– 16K Bytes with Optional Boot Block (256 - 2K Bytes)Endurance: 1,000 Write/Erase Cycles8-bit– Boot Section Allows Reprogramming of Program Code without ExternalProgrammerMicrocontroller– Optional Boot Code Section with Independent Lock Bits – 512 Bytes EEPROMwith 16K BytesEndurance: 100,000 Write/Erase Cycles– 1024 Bytes Internal SRAM – Programming Lock for Software SecurityIn-System • Peripheral Features– Two 8-bit Timer/Counters with Separate Prescaler and Compare ModeProgrammable– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and CaptureModeFlash– Real Time Clock with Separate Oscillator and Counter Mode – Three PWM Channels – 8-channel, 10-bit ADC – Byte-oriented Two-wire Serial InterfaceATmega163– Programmable Serial UART – Master/Slave SPI Serial InterfaceATmega163L– Programmable Watchdog Timer with Separate On-chip Oscillator – Analog Comparator • Special Microcontroller Features– Power-on Reset and Programmable Brown-out DetectionSummary– Internal Calibrated RC Oscillator – External and Internal Interrupt Sources – Four Sleep Modes: Idle, ADC Noise Reduction, Power-save, and Power-down • Power Consumption at 4 MHz, 3.0V, 25 ° C– Active 5.0 mA – Idle Mode 1.9 mA – Power-down Mode < 1 µANot Recommend for • I/O and Packages– 32 Programmable I/O LinesNew Designs. Use– 40-pin PDIP and 44-pin TQFPATmega16. • Operating Voltages– 2.7 - 5.5V for ATmega163L – 4.0 - 5.5V for ATmega163 • Speed Grades– 0 - 4 MHz for ATmega163L – 0 - 8 MHz for ATmega163 Rev.1142ES–AVR–02/03 Note: This is a summary document. A complete document is available on our web site at www.atmel.com. 1 Document Outline Features Pin Configurations Description Block Diagram Pin Descriptions VCC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) RESET XTAL1 XTAL2 AVCC AREF AGND Register Summary Instruction Set Summary Ordering Information Packaging Information 44A 40P6 Erratas ATmega163(L) Errata Rev. F ChangeLog Changes from Rev. 1142C-09/01 to Rev. 1142D-09/02 Changes from Rev. 1142D-09/09 to Rev. 1142E-02/03