Datasheet LT3750 (Analog Devices) - 10

LT3750
U U W U APPLICATIO S I FOR ATIO Table 4. Recommended NMOS Transisitors MANUFACTURER PART NUMBER ID (A) VDS(MAX) (V) VGS(MAX) (V) RDS(ON) (m
Ω
) PACKAGE
Philips Semiconductor PHM21NQ15T 22.2 150 20 55 HVSON8 (www.semiconductors.philips.com) PHK12NQ10T 11.6 100 20 28 SO-8 PHT6NQ10Y 6.5 100 20 90 SOT223 PSMN038-100K 6.3 100 20 38 SO-8 International Rectifier IRF7488 6.3 80 20 29 SO-8 (www.irf.com) IRF7493 9.3 80 20 15 SO-8 IRF6644 10.3 100 20 10.7 DirectFET The transistor’s continuous drain current rating must Use at least 1% tolerance resistors for RVOUT and RBG. exceed IAVG,M. Choosing large value resistors for RBG decreases the amount of current that charges the parasitic internal Table 4 lists recommended NMOS transistors. capacitances and degrades the response time of the VOUT
Setting Current Limit
comparator. This may result in overcharging of the output capacitor. The maximum recommended value for RBG is A sense resistor from the SOURCE pin to GND implements 2.5k for typical applications. current limit. The current limit is nominally 78mV/RSENSE. The average power dissipation rating of the current sense When high primary currents are used, a voltage spike resistor must exceed: can prematurely trip the output voltage comparator. A 33pF to 100pF capacitor in parallel with RBG is sufficient to I 2 • R ⎛ V ⎞ filter this spike for most applications. Always check that ( ) P PK SENSE OUT PK RESISTOR ≥ ⎜ ⎟ the voltage waveform on RBG does not overshoot and that 3 V ⎝ ( ) + N • V OUT PK TR RANS ⎠ it reaches a plateau at maximum VOUT. Additionally, there is approximately a 100ns propagation
Discontinuous Mode Detection
delay from the time that peak current limit is detected to when the gate transitions to the low state. This delay The RDCM resistor stands off voltage transients on the increases the peak current limit by (V drain node. A 43k, 5% resistor is recommended for 300V TRANS)(tDELAY)/LPRI. applications. Higher output voltages will require a larger
Setting The Target Output Voltage
resistor. The parameters that determine the target output voltage In order for the LT3750 to properly detect discontinuous are the resistors RVOUT and RBG, the turns ratio of the mode and start a new charge cycle, the reflected voltage to transformer (N), and the voltage drop across the output the primary winding must exceed the discontinuous mode diode (VDIODE). The target output voltage is set according comparator threshold which is nominally 36mV. The to the following equation: worst-case condition occurs when VOUT is shorted to ground. When this occurs, the reflected voltage is simply ⎛ R ⎞ the diode forward voltage drop divided by N. V = 1.24V VOUT • • N – V OUT ⎝⎜ R DIODE BG ⎠⎟ 3750fa 10