AD693ModelAD693ADConditionsMinTypMaxUnits AUXILIARY AMPLIFIER Common-Mode Range 0 +VOP – 4 V6 V Input Offset Voltage ±50 ±200 µV Input Bias Current +5 +20 nA Input Offset Current +0.5 ±3.0 nA Common-Mode Rejection 90 dB Power Supply Rejection 105 dB Output Current Range Pin IX OUT +0.01 +5 mA Output Current Error Pin V ± X – Pin IX 0.005 % TEMPERATURE RANGE Case Operating14 TMIN to TMAX –40 +85 °C Storage –65 +150 °C NOTES 1 Total error can be significantly reduced (typically less than 0.1%) by trimming the zero current. The remaining unadjusted error sources are transconductance and nonlinearity. 2 The AD693 is tested as a loop powered device with the signal amp, V/I converter, voltage reference, and application voltages operating together. Specifications are valid for preset spans and spans between 30 mV and 60 mV. 3 Error from ideal output assuming a perfect 100 Ω RTD at 0 and +100°C. 4 Refer to the Error Analysis to calculate zero current error for input spans less than 30 mV. 5 By forcing the differential signal amplifier input sufficiently negative the 7 µA zero current can always be achieved. 6 The operational voltage (VOP) is the voltage directly across the AD693 (Pin 10 to 6 in two-wire mode, Pin 9 to 6 in local power mode). For example, VOP = VS – (ILOOP × RL) in two-wire mode (refer to Figure 10). 7Bias currents are not symmetrical with input signal level and flow out of the input pins. The input bias current of the inverting input increases with input signal volt- age, see Figure 2. 8 Nonlinearity is defined as the deviation of the output from a straight line connecting the endpoints as the input is swept over a 30 mV and 60 mV input span. 9 Specifications for the individual functional blocks are components of error that contribute to, and that are included in, the Loop Powered Operation specifications. 10 Includes error contributions of V/I converter and Application Voltages. 11 Changes in the reference output voltage due to load will affect the Zero Current. A 1% change in the voltage reference output will result in an error of 1% in the value of the Zero Current. 12 If not used for external excitation, the reference should be loaded by approximately 1 mA (6.2 kΩ to common). 13 In the loop powered mode up to 5 mA can be drawn from the reference, however, the lower limit of the output span will be increased accordingly. 3.5 mA is the maximum current the reference can source while still maintaining a 4 mA zero. 14 The AD693 is tested with a pass transistor so TA ≅ TC. Specifications subject to change without notice. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. ABSOLUTE MAXIMUM RATINGSAD693 PIN CONFIGURATION Supply Voltage . +36 V (AD, AQ, AE Packages) Reverse Loop Current . 200 mA Signal Amp Input Range . –0.3 V to VOP Reference Short Circuit to Common . Indefinite Auxiliary Amp Input Voltage Range . 0.3 V to VOP Auxiliary Amp Current Output . 10 mA Storage Temperature . –65°C to +150°C Lead Temperature, 10 sec Soldering . +300°C Max Junction Temperature . +150°C ORDERING GUIDEPackagePackageModelDescriptionOption AD693AD Ceramic Side-Brazed DIP D-20 AD693AQ Cerdip Q-20 AD693AE Leadless Ceramic Chip E-20A Functional Diagram Carrier (LCCC) REV. A –3–