Datasheet AD5751 (Analog Devices) - 6

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AD5751 Data Sheet Parameter1 Min Typ Max Unit Test Conditions/Comments
Gain TC4 ±1 ppm FSR/°C Full-Scale Error −0.1 +0.1 % FSR −0.07 ±0.02 +0.07 % FSR TA = 25°C Full-Scale TC4 ±2 ppm FSR/°C OUTPUT CHARACTERISTICS4 Current Loop Compliance Voltage 0 AVDD − 2.75 V Resistive Load Chosen such that compliance is not exceeded Inductive Load See test conditions/comments column H Needs appropriate capacitor at higher inductance values; see Driving Inductive Loads section Settling Time 4 mA to 20 mA, Full-Scale Step 8.5 µs 250 Ω load 120 µA Step, 4 mA to 20 mA Range 1.2 µs 250 Ω load DC PSRR 1 µA/V Output Impedance 130 MΩ DIGITAL INPUTS4 JEDEC compliant Input High Voltage, VIH 2 V Input Low Voltage, VIL 0.8 V Input Current −1 +1 µA Per pin Pin Capacitance 5 pF Per pin DIGITAL OUTPUTS4 FAULT, IFAULT, TEMP, VFAULT VOL, Output Low Voltage 0.4 V 10 kΩ pull-up resistor to DVCC 0.6 V At 2.5 mA VOH, Output High Voltage 3.6 V 10 kΩ pull-up resistor to DVCC SDO VOL, Output Low Voltage 0.5 0.5 V Sinking 200 µA VOH, Output High Voltage DVCC − 0.5 DVCC − 0.5 V Sourcing 200 µA High Impedance Output 3 pF Capacitance High Impedance Leakage Current −1 +1 µA POWER REQUIREMENTS AVDD 10.8 55 V DVCC Input Voltage 2.7 5.5 V AIDD 4.4 5.6 mA Output unloaded, output disabled 5.2 6.2 mA Current output enabled 5.2 6.2 mA Voltage output enabled DICC 0.3 1 mA VIH = DVCC, VIL = GND Power Dissipation 108 mW AVDD = 24 V, outputs unloaded 1 Temperature range: −40°C to +105°C; typical at +25°C. 2 Overranges are nominal; gain and offset are not trimmed as per nominal ranges. 3 Specification includes gain and offset errors, over temperature, and drift after 1000 hours, TA = 125°C. 4 Guaranteed by characterization, but not production tested. Rev. D | Page 6 of 32 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Current Output Terminology Theory of Operation Software Mode Currrent Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of the AD5751 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Readback Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) External Current Setting Resistor Programmable Overrange Modes Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide