Datasheet AD5751 (Analog Devices) - 2
| Fabricante | Analog Devices |
| Descripción | Industrial I/V Output Driver, Single-Supply, 55 V Maximum Supply, Programmable Ranges |
| Páginas / Página | 32 / 2 — AD5751. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 1/2018—Rev. C to … |
| Revisión | D |
| Formato / tamaño de archivo | PDF / 631 Kb |
| Idioma del documento | Inglés |
AD5751. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 1/2018—Rev. C to Rev. D. 10/2013—Rev. A to Rev. B
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AD5751 Data Sheet TABLE OF CONTENTS
Features .. 1 OUTEN .. 24 Applications ... 1 Software Control .. 24 General Description ... 1 Hardware Control .. 26 Revision History ... 2 Transfer Function ... 26 Functional Block Diagram .. 3 Detailed Description of Features .. 27 Specifications ... 4 Output Fault Alert—Software Mode ... 27 Timing Characteristics .. 7 Output Fault Alert—Hardware Mode ... 27 Absolute Maximum Ratings .. 9 Voltage Output Short-Circuit Protection .. 27 ESD Caution .. 9 Asynchronous Clear (CLEAR) ... 27 Pin Configuration and Function Descriptions ... 10 External Current Setting Resistor .. 27 Typical Performance Characteristics ... 12 Programmable Overrange Modes .. 28 Current Output ... 15 Packet Error Checking ... 28 Terminology .. 20 Applications Information .. 29 Theory of Operation .. 21 Transient Voltage Protection .. 29 Software Mode .. 21 Thermal Considerations .. 29 Currrent Output Architecture .. 23 Layout Guidelines... 30 Driving Inductive Loads .. 23 Galvanical y Isolated Interface ... 30 Power-On State of the AD5751 .. 23 Microprocessor Interfacing ... 30 Default Registers at Power-On ... 24 Outline Dimensions ... 31 Reset Function .. 24 Ordering Guide .. 31
REVISION HISTORY 1/2018—Rev. C to Rev. D 10/2013—Rev. A to Rev. B
Changed CP-32-7 to CP-32-2 .. Throughout Changed Thermal Impedance from 28°C/W to 42°C/W Changes to Figure 4 .. 10 (Throughout) ... 9 Updated Outline Dimensions ... 31 Added Endnote 1 to Table 4 ... 9 Changes to Ordering Guide .. 31 Changes to Table 12 Calculations... 29 Updated Outline Dimensions ... 31
3/2017—Rev. B to Rev. C
Changed CP-32-2 to CP-32-7 .. Throughout
5/2010—Rev. 0 to Rev. A
Changes to Figure 4 .. 10 Changes to Table 2, Power Requirements .. 6 Updated Outline Dimensions ... 31 Changes to Ordering Guide .. 31
10/2009—Revision 0: Initial Version
Rev. D | Page 2 of 32 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Current Output Terminology Theory of Operation Software Mode Currrent Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of the AD5751 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Readback Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) External Current Setting Resistor Programmable Overrange Modes Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide
AD5751 Data Sheet TABLE OF CONTENTS
Features .. 1 OUTEN .. 24 Applications ... 1 Software Control .. 24 General Description ... 1 Hardware Control .. 26 Revision History ... 2 Transfer Function ... 26 Functional Block Diagram .. 3 Detailed Description of Features .. 27 Specifications ... 4 Output Fault Alert—Software Mode ... 27 Timing Characteristics .. 7 Output Fault Alert—Hardware Mode ... 27 Absolute Maximum Ratings .. 9 Voltage Output Short-Circuit Protection .. 27 ESD Caution .. 9 Asynchronous Clear (CLEAR) ... 27 Pin Configuration and Function Descriptions ... 10 External Current Setting Resistor .. 27 Typical Performance Characteristics ... 12 Programmable Overrange Modes .. 28 Current Output ... 15 Packet Error Checking ... 28 Terminology .. 20 Applications Information .. 29 Theory of Operation .. 21 Transient Voltage Protection .. 29 Software Mode .. 21 Thermal Considerations .. 29 Currrent Output Architecture .. 23 Layout Guidelines... 30 Driving Inductive Loads .. 23 Galvanical y Isolated Interface ... 30 Power-On State of the AD5751 .. 23 Microprocessor Interfacing ... 30 Default Registers at Power-On ... 24 Outline Dimensions ... 31 Reset Function .. 24 Ordering Guide .. 31
REVISION HISTORY 1/2018—Rev. C to Rev. D 10/2013—Rev. A to Rev. B
Changed CP-32-7 to CP-32-2 .. Throughout Changed Thermal Impedance from 28°C/W to 42°C/W Changes to Figure 4 .. 10 (Throughout) ... 9 Updated Outline Dimensions ... 31 Added Endnote 1 to Table 4 ... 9 Changes to Ordering Guide .. 31 Changes to Table 12 Calculations... 29 Updated Outline Dimensions ... 31
3/2017—Rev. B to Rev. C
Changed CP-32-2 to CP-32-7 .. Throughout
5/2010—Rev. 0 to Rev. A
Changes to Figure 4 .. 10 Changes to Table 2, Power Requirements .. 6 Updated Outline Dimensions ... 31 Changes to Ordering Guide .. 31
10/2009—Revision 0: Initial Version
Rev. D | Page 2 of 32 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Timing Characteristics Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Current Output Terminology Theory of Operation Software Mode Currrent Output Architecture Driving Inductive Loads Voltage Output Amplifier Driving Large Capacitive Loads Power-On State of the AD5751 Default Registers at Power-On Reset Function OUTEN Software Control Input Shift Register Readback Operation Hardware Control Transfer Function Detailed Description of Features Output Fault Alert—Software Mode Output Fault Alert—Hardware Mode Voltage Output Short-Circuit Protection Asynchronous Clear (CLEAR) External Current Setting Resistor Programmable Overrange Modes Packet Error Checking Applications Information Transient Voltage Protection Thermal Considerations Layout Guidelines Galvanically Isolated Interface Microprocessor Interfacing Outline Dimensions Ordering Guide