Datasheet LTC3786 (Analog Devices) - 9

FabricanteAnalog Devices
DescripciónLow IQ Synchronous Boost Controller
Páginas / Página34 / 9 — (MSOP/QFN). FREQ (Pin 7/Pin 9):. BG (Pin 10/Pin 12):. INTV. CC (Pin …
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(MSOP/QFN). FREQ (Pin 7/Pin 9):. BG (Pin 10/Pin 12):. INTV. CC (Pin 11/Pin 13):. VBIAS (Pin 12/Pin 14):. RUN (Pin 8/Pin 10):

(MSOP/QFN) FREQ (Pin 7/Pin 9): BG (Pin 10/Pin 12): INTV CC (Pin 11/Pin 13): VBIAS (Pin 12/Pin 14): RUN (Pin 8/Pin 10):

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LTC3786 PIN FUNCTIONS
(MSOP/QFN) FREQ (Pin 7/Pin 9):
The Frequency Control Pin for the
BG (Pin 10/Pin 12):
Bottom Gate. Connect to the gate of Internal VCO. Connecting the pin to GND forces the VCO the main N-channel MOSFET. to a fixed low frequency of 350kHz. Connecting the pin
INTV
to INTV
CC (Pin 11/Pin 13):
Output of Internal 5.4V LDO. CC forces the VCO to a fixed high frequency of Power supply for control circuits and gate drivers. De- 535kHz. The frequency can be programmed from 50kHz couple this pin to GND with a minimum 4.7µF low ESR to 900kHz by connecting a resistor from the FREQ pin to ceramic capacitor. GND. The resistor and an internal 20µA source current create a voltage used by the internal oscillator to set the
VBIAS (Pin 12/Pin 14):
Main Supply Pin. It is normally frequency. Alternatively, this pin can be driven with a DC tied to the input supply VIN or to the output of the boost voltage to vary the frequency of the internal oscillator. converter. A bypass capacitor should be tied between this pin and the GND pin. The operating voltage range on this
RUN (Pin 8/Pin 10):
Run Control Input. Forcing this pin pin is 4.5V to 38V (40V abs max). below 1.28V shuts down the controller. Forcing this pin below 0.7V shuts down the entire LTC3786, reducing
BOOST (Pin 13/Pin 15):
Floating Power Supply for the quiescent current to approximately 8µA. An external Synchronous MOSFET. Bypass to SW with a capacitor resistor divider connected to VIN can set the threshold and supply with a Schottky diode connected to INTVCC. for converter operation. There is a 0.5µA pull-up current
TG (Pin 14/Pin 16):
Top Gate. Connect to the gate of the for this pin. Once the RUN pin raises above 1.28V, an synchronous NMOS. additional 4.5µA pull-up current is added to the pin for programmable hysteresis.
SW (Pin 15/Pin 1):
Switch Node. Connect to the source of the synchronous top MOSFET, the drain of the main
GND (Pin 9, Exposed Pad Pin 17/ Pin 11, Exposed Pad
bottom MOSFET, and the inductor.
Pin 17):
Ground. Connects to the source of the bottom (main) N-channel MOSFET and the (–) terminal(s) of C
PGOOD (Pin 16/Pin 2):
Power Good Indicator. Open-drain IN and C logic output that is pulled to ground when the output volt- OUT . All small-signal components and compensa- tion components should also connect to this ground. age is more than ±10 % away from the regulated output The exposed pad must be soldered to the PCB for rated voltage. To avoid false trips the output voltage must be thermal performance. outside of the range for 25µs before this output is activated. 3786fc For more information www.linear.com/LTC3786 9