Datasheet LT3741, LT3741-1 (Analog Devices) - 9

LT3741/LT3741-1
PIN FUNCTIONS (QFN/TSSOP) EN/UVLO (Pin 1/Pin 4):
Enable Pin. The EN/UVLO pin
VC (Pin 10/Pin 13):
VC provides the necessary comp- acts as an enable pin and turns on the internal current ensation for the average current loop stability. Typical bias core and subregulators at 1.55V. The pin does compensation values are 20k to 50k for the resistor and not have any pull-up or pull-down, requiring a voltage 2nF to 5nF for the capacitor. bias for normal part operation. Full shutdown occurs at
RT (Pin 12/Pin 14):
A resistor to ground sets the switching approximately 0.5V. frequency between 200kHz and 1MHz. When using the
VREF (Pin 2/Pin 5):
Buffered 2V reference capable of SYNC function, set the frequency to be 20% lower than 0.5mA drive. the SYNC pulse frequency. This pin is current limited to
CTRL2 (Pin 3/Pin 6):
Thermal control input used to reduce 60µA. Do not leave this pin open. the regulated current level.
SYNC (Pin 13/Pin 15):
Frequency Synchronization Pin.
GND (Pins 4,11,14, Exposed Pad Pin 21/Pins 2,7,16,
This pin allows the switching frequency to be synchronized
Exposed Pad Pin 21):
Ground. The exposed pad must be to an external clock. The RT resistor should be chosen to soldered to the PCB operate the internal clock at 20% slower than the SYNC pulse frequency. This pin should be grounded when not
CTRL1 (Pin 5/Pin 8):
The CTRL1 pin sets the high level in use. When laying out board, avoid noise coupling to regulated output current and overcurrent. The maximum or from SYNC trace. input voltage is internally clamped to 1.5V. The overcurrent set point is equal to the high level regulated current level set
HG (Pin 15/Pin 17):
HG is the top-FET gate drive signal by the CTRL1 pin with an additional 23mV offset between that controls the state of the high-side external power the SENSE+ and SENSE– pins. FET. The driver pull-up impedance is 2.3Ω and pull-down impedance is 1.3Ω.
SS (Pin 6/Pin 9):
The Soft-Start Pin. Place an external capacitor to ground to limit the regulated current during
SW (Pin 16/Pin 18):
The SW pin is used internally as the start-up conditions. The soft-start pin has a 11µA charg- lower-rail for the floating high-side driver. Externally, this ing current. This pin controls regulated output current node connects the two power-FETs and the inductor. determined by CTRL1.
CBOOT (Pin 17/Pin 19):
The CBOOT pin provides a float-
FB (Pin 7/Pin 10):
Feedback Pin for Voltage Regulation ing 5V regulated supply for the high-side FET driver. An and Overvoltage Protection. The feedback voltage is 1.21V. external Schottky diode is required from the VCC_INT pin Overvoltage is also sensed through the FB pin. When the to the CBOOT pin to charge the CBOOT capacitor when feedback voltage exceeds 1.5V, the overvoltage lockout the switch-pin is near ground. prevents switching for 13μs to allow the inductor current
LG (Pin 18/Pin 20):
LG is the bottom-FET gate drive signal to discharge. that controls the state of the low-side external power-FET.
SENSE+ (Pin 8/Pin 11):
SENSE+ is the inverting input of The driver pull-up impedance is 2.3Ω and pull-down the average current mode loop error amplifier. This pin is impedance is 1.0Ω. connected to the external current sense resistor, RS. The
VCC_INT (Pin 19/Pin 1):
A regulated 5V output for charging voltage drop between SENSE+ and SENSE– referenced to the CBOOT capacitor. VCC_INT also provides the power the voltage drop across an internal resistor produces the for the digital and switching subcircuits. Below 6V VIN, input voltages to the current regulation loop. tie this pin to the rail. VCC_INT is current limited to 50mA.
SENSE– (Pin 9/Pin 12):
SENSE– is the non-inverting Shutdown operation disables the output voltage drive. input of the average current mode loop error amplifier.
VIN (Pin 20/Pin 3):
Input Supply Pin. Must be locally The reference current, based on CTRL1 or CTRL2 flows bypassed with a 4.7μF low-ESR capacitor to ground. out of the pin to the output side of the sense resistor, RS. 37411fg For more information www.linear.com/LT3741 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts