Datasheet PIC16F18426, PIC16F18446, PIC16LF18426, PIC16LF18446 (Microchip) - 2

FabricanteMicrochip
Descripción14/20-Pin Full-Featured, Low Pin Count Microcontrollers with XLP
Páginas / Página757 / 2 — PIC16(L)F18426/46. • •. • 256B Data EEPROM. Direct, Indirect and Relative …
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PIC16(L)F18426/46. • •. • 256B Data EEPROM. Direct, Indirect and Relative Addressing modes. Memory Access Partition (MAP):

PIC16(L)F18426/46 • • • 256B Data EEPROM Direct, Indirect and Relative Addressing modes Memory Access Partition (MAP):

Versión de texto del documento

PIC16(L)F18426/46


• •
• 256B Data EEPROM
Direct, Indirect and Relative Addressing modes
Memory Access Partition (MAP):
– Write-protect
– Customizable partition
Device Information Area (DIA)
Device Configuration Information (DCI) Operating Characteristics
• • Operating Voltage Range:
– 1.8V to 3.6V (PIC16LF184XX)
– 2.3V to 5.5V (PIC16F184XX)
Temperature Range:
– Industrial: -40°C to 85°C
– Extended: -40°C to 125°C Power-Saving Operation Modes



• • Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower)
Idle: CPU Halted While Peripherals Operate
Sleep: Lowest Power Consumption
Peripheral Module Disable (PMD):
– Ability to selectively disable hardware module to minimize active power consumption of unused
peripherals
Extreme Low-Power mode (XLP)
– Sleep: 500 nA typical @ 1.8V
– Sleep and Watchdog Timer: 900 nA typical @ 1.8V eXtreme Low-Power (XLP) Features


• Sleep mode: 50 nA @ 1.8, typical
Watchdog Timer: 500 nA @ 1.8V, typical
Secondary Oscillator: 500 nA @ 32 kHz • Operating Current:
– 8 uA @ 32 kHz, 1.8V, typical
– 32 uA/MHz @ 1.8V, typical Digital Peripherals
• • Configurable Logic Cell (CLC):
– 4 CLCs
– Integrated combinational and sequential logic
Complementary Waveform Generator (CWG):
– 2 CWGs © 2017 Microchip Technology Inc. Datasheet Preliminary DS40001985A-page 2