Datasheet KSZ8893MQL, KSZ8893MBL (Microchip) - 2

Micrel, Inc. KSZ8893MQL/MBL Features
• Proven Integrated 3-Port 10/100 Ethernet Switch
– 3rd generation switch with three MACs and two
PHYs fully compliant with IEEE 802.3u standard
– Non-blocking switch fabric assures fast packet
delivery by utilizing an 1K MAC address lookup table
and a store-and-forward architecture
– Full duplex IEEE 802.3x flow control (PAUSE) with
force mode option
– Half-duplex back pressure flow control
– HP Auto MDI-X for reliable detection of and correction
for straight-through and crossover cables with disable
and enable option
TM
– Micrel LinkMD TDR-based cable diagnostics permit
identification of faulty copper cabling
– 100BASE-FX support on port 1
– MII interface supports both MAC mode and PHY
mode
– RMII interface support with external 50MHz system
clock
– 7-wire serial network interface (SNI) support for
legacy MAC
– Comprehensive LED Indicator support for link,
activity, full/half duplex and 10/100 speed • Switch Monitoring Features
– Port mirroring/monitoring/sniffing: ingress and/or
egress traffic to any port or MII
– MIB counters for fully compliant statistics gathering,
34 MIB counters per port
– Loopback modes for remote diagnostic of failure • Low Power Dissipation:
– Full-chip hardware power-down (register configuration
not saved)
– Per port based software power-save on PHY (idle link
detection, register configuration preserved)
– Voltages: Single power supply: 3.3V
o
o
• Industrial Temperature Range: –40 C to +85 C
• Available in 128-Pin PQFP and 100-ball LFBGA,
Lead-free package Applications
• Typical
– Media Converter
– FTTx customer premises equipment
– VoIP Phone
– SOHO Residential Gateway
– Broadband Gateway / Firewall / VPN
– Integrated DSL/Cable Modem
– Wireless LAN access point + gateway
– Set-top/Game Box
– Standalone 10/100 switch • Comprehensive Configuration Register Access
– Serial management interface (SMI) to all internal
registers
– MII management (MIIM) interface to PHY registers
2
– SPI and I C Interface to all internal registers
– I/0 pins strapping and EEPROM to program selective
registers in unmanaged switch mode
– Control registers configurable on the fly (port-priority,
802.1p/d/q, AN…) • Upgradeable(1)
– Unmanaged switch with future option to migrate to a
managed solution
– Single PHY alternative with future expansion option
for two ports • QoS/CoS Packet Prioritization Support
– Per port, 802.1p and DiffServ-based
– Re-mapping of 802.1p priority field per port basis
– Four priority levels • Industrial • Advanced Switch Features – Applications requiring port redundancy and port
monitoring
– Sensor devices in redundant ring topology – IEEE 802.1q VLAN support for up to 16 groups (fullrange of VLAN IDs)
– VLAN ID tag/untag options, per port basis
– IEEE 802.1p/q tag insertion or removal on a per port
basis (egress)
– Programmable rate limiting at the ingress and egress
on a per port basis
– Broadcast storm protection with % control (global and
per port basis)
– IEEE 802.1d spanning tree protocol support
– Special tagging mode to inform the processor which
ingress port receives the packet
– IGMP snooping (Ipv4) and MLD snooping (Ipv6)
support for multicast packet filtering
– MAC filtering function to forward unknown unicast
packets to specified port
– Double-tagging support
– Support IEEE 802.1w, 802.1t spanning tree Note: 1. Reduces cost and time of PCB re-spin. • Low Latency Support
– Repeater mode February 2010 2 M9999-021110-1.6