Datasheet LT8364 (Analog Devices) - 9

LT8364
OPERATION
The LT8364 uses a fixed frequency, current mode con- If the EN/UVLO pin voltage is below 1.6V, the LT8364 trol scheme to provide excellent line and load regula- enters undervoltage lockout (UVLO), and stops switching. tion. Operation can be best understood by referring When the EN/UVLO pin voltage is above 1.68V (typical), to the Block Diagram. An oscillator (with frequency the LT8364 resumes switching. If the EN/UVLO pin volt- programmed by a resistor at the RT pin) turns on the age is below 0.2V, the LT8364 draws less than 1µA from internal power switch at the beginning of each clock VIN. cycle. Current in the inductor then increases until the For the SYNC/MODE pin tied to ground or <0.14V, the current comparator trips and turns off the power switch. LT8364 will enter low output ripple Burst Mode opera- The peak inductor current at which the switch turns off tion for ultra low quiescent current during light loads to is controlled by the voltage on the VC pin. The error maintain high efficiency. For a 100k resistor from SYNC/ amplifier servos the VC pin by comparing the voltage on MODE pin to GND, the LT8364 uses Burst Mode opera- the FBX pin with an internal reference voltage (1.60V or tion for improved efficiency at light loads but seamlessly –0.80V, depending on the chosen topology). When the transitions to Spread-Spectrum Modulation of switch- load current increases it causes a reduction in the FBX ing frequency for low EMI at heavy loads. For the SYNC/ pin voltage relative to the internal reference. This causes MODE pin floating (left open), the LT8364 uses pulse- the error amplifier to increase the VC pin voltage until the skipping mode, at the expense of hundreds of microamps, new load current is satisfied. In this manner, the error to maintain output voltage regulation at light loads by amplifier sets the correct peak switch current level to skipping switch pulses. For the SYNC/MODE pin tied to keep the output in regulation. INTVCC or >1.7V, the LT8364 uses pulse-skipping mode The LT8364 is capable of generating either a positive or and performs Spread-Spectrum Modulation of switching negative output voltage with a single FBX pin. It can be frequency. For the SYNC/MODE pin driven by an external configured as a boost or SEPIC converter to generate a clock, the converter switching frequency is synchronized positive output voltage, or as an inverting converter to to that clock and pulse-skipping mode is also enabled. See generate a negative output voltage. When configured as the Pin Functions section for SYNC/MODE pin. a Boost converter, as shown in the Block Diagram, the The LT8364 includes a BIAS pin to improve efficiency FBX pin is pulled up to the internal bias voltage of 1.60V across all loads. The LT8364 intelligently chooses by a voltage divider (R1 and R2) connected from VOUT between the V to GND. Amplifier A2 becomes inactive and amplifier A1 IN and BIAS pins to supply the INTVCC for best efficiency. The INTV performs (inverting) amplification from FBX to V CC supply current can be drawn C. When from the BIAS pin instead of the V the LT8364 is in an inverting configuration, the FBX pin IN pin for 4.4V ≤ BIAS ≤ V is pulled down to –0.80V by a voltage divider from V IN. OUT to GND. Amplifier A1 becomes inactive and amplifier A2 Protection features ensure the immediate disable of performs (non-inverting) amplification from FBX to VC. switching and reset of the SS pin for any of the following faults: internal reference UVLO, INTVCC UVLO, switch cur- rent > 1.5× maximum limit, EN/UVLO < 1.6V or junction temperature > 170°C. 8364f For more information www.linear.com/LT8364 9 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS