Datasheet LTC4302-1, LTC4302-2 (Analog Devices) - 8

LTC4302-1/LTC4302-2
U OPERATIO Live Insertion and Start-Up
serial communication busses; however, calling them two wire is not strictly accurate, as there is an implied third The LTC4302 allows I/O card insertion into a live back- wire which is the ground line. Large ground drops or plane without corruption of the data and clock busses spikes between the grounds of different parts on the bus (SDA and SCL). In its main application, the LTC4302 can interrupt or disrupt communications, as the signals on resides on the edge of a peripheral card with the SCLOUT the two wires are both inherently referenced to a ground pin connected to the card’s SCL bus and the SDAOUT which is expected to be common to all parts on the bus. connected to the card’s SDA bus. If a card is plugged into Both bus types have one data line and one clock line which a live backplane via a staggered connector, ground and are externally pulled to a high voltage when they are not VCC make connection first. The LTC4302 starts in an being controlled by a device on the bus. The devices on the undervoltage lockout (UVLO) state, ignoring any activity bus can only pull the data and clock lines low, which makes on the SDA and SCL pins until VCC rises above 2.5V it simple to detect if more than one device is trying to (typical). This ensures that the LTC4302 does not try to control the bus; eventually, a device will release a line and function until it has sufficient bias voltage. it will not pull high because another device is still holding During this time, the 1V precharge circuitry is also active it low. Pullups for the data and clock lines are usually and forces 1V through 100k nominal resistors to the SDA provided by external discrete resistors, but external cur- and SCL pins. The concept of initializing the SDA and SCL rent sources can also be used. Since there are no dedi- pins before they make contact with a live backplane is cated lines to use to tell a given device if another device is described in the CompactPCITM specification. Because the trying to communicate with it, each device must have a I/O card is being plugged into a live backplane, the voltage unique address to which it will respond. The first part of on the SDA and SCL busses may be anywhere between 0V any communication is to send out an address on the bus and VCC. Precharging the SCL and SDA pins to 1V mini- and wait to see if another device responds to it. After a mizes the worst-case voltage differential these pins will response is detected, meaningful data can be exchanged see at the moment of connection, therefore minimizing the between the parts. amount of disturbance caused by the I/O card. The Typically, one device controls the clock line at least most LTC4302-1 precharges all four SDA and SCL pins when- of the time and normally sends data to the other parts and ever the VCC voltage is below its UVLO threshold voltage. polls them to send data back. This device is called the The LTC4302-2 precharges SDAIN and SCLIN whenever master. There can be more than one master, since there is VCC is below its UVLO threshold and precharges SDAOUT an effective protocol to resolve bus contentions, and non- and SCLOUT whenever VCC2 is below its UVLO threshold. master (slave) devices can also control the clock to delay After ground and VCC connect, SDAIN and SCLIN make rising edges to give themselves more time to complete connection with the backplane SDA and SCL lines. Once calculations or communications (clock stretching). Slave the part comes out of UVLO, the precharge circuitry is shut devices need to control the data line to acknowledge off. Finally, the CONN pin connects to the short CONN pin communications from the master. Some devices need to on the backplane, the 2-wire bus digital interface circuitry send data back to the master; they will be in control of the is activated and a master on the bus can write to or read data line while they are doing so. Many slave devices have from the LTC4302. no need to stretch the clock signal, which is the case with the LTC4302.
General I2C Bus/SMBus Description
Data is exchanged in the form of bytes, which are 8-bit The LTC4302 is designed to be compatible with the I2C and packets. Any byte needs to be acknowledged by the slave SMBus two wire bus systems. I2C Bus and SMBus are or master (data line pulled low) or not acknowledged by reasonably similar examples of two wire, bidirectional, the master (data line left high), so communications are CompactPCI is a trademark of the PCI Industrial Computer Manufacturers Group. sn430212 430212fs 8