Datasheet DN2530 (Microchip)
| Fabricante | Microchip |
| Descripción | N-Channel, Depletion-Mode, Vertical DMOS FET |
| Páginas / Página | 13 / 1 — DN2530. N-Channel, Depletion-Mode, Vertical DMOS FET. Features. … |
| Formato / tamaño de archivo | PDF / 669 Kb |
| Idioma del documento | Inglés |
DN2530. N-Channel, Depletion-Mode, Vertical DMOS FET. Features. Description. Applications. Package Types. DRAIN. SOURCE. GATE. TO-92
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DN2530 N-Channel, Depletion-Mode, Vertical DMOS FET Features Description
• High-input impedance The DN2530 is a low-threshold, depletion-mode, nor- • Low-input capacitance mally-on transistor that utilizes an advanced vertical • Fast switching speeds DMOS structure and a well-proven silicon-gate manu- • Low on-resistance facturing process. This combination produces a device • Free from secondary breakdown with the power-handling capabilities of bipolar transis- tors, plus the high-input impedance and positive-tem- • Low input and output leakage perature coefficient inherent in Metal-Oxide Semiconductor (MOS) devices. Characteristic of all
Applications
MOS structures, this device is free from thermal run- • Normally-on switches away and thermally-induced secondary breakdown. • Solid state relays Vertical DMOS Field-Effect Transistors (FETs) are ide- • Converters ally suited to a wide range of switching and amplifying • Linear amplifiers applications where high breakdown-voltage, high-input • Constant current sources impedance, low-input capacitance, and fast switching • Power supply circuits speeds are desired. • Telecom
Package Types DRAIN DRAIN SOURCE SOURCE DRAIN GATE GATE TO-92 TO-243AA (SOT-89)
See Table 2-1 for pin information 2016 Microchip Technology Inc. DS20005451A-page 1 Document Outline 1.0 Electrical Characteristics 2.0 Pin Description TABLE 2-1: Pin Description 3.0 Functional Description FIGURE 3-1: Switching Waveforms and Test Circuit FIGURE 3-2: Typical Performance Curves FIGURE 3-3: Typical Performance Curves (continued) 4.0 Packaging Information 4.1 Package Marking Information AMERICAS Corporate Office Atlanta Austin, TX Boston Chicago Cleveland Dallas Detroit Houston, TX Indianapolis Los Angeles New York, NY San Jose, CA Canada - Toronto ASIA/PACIFIC Asia Pacific Office Hong Kong Australia - Sydney China - Beijing China - Chengdu China - Chongqing China - Dongguan China - Hangzhou China - Hong Kong SAR China - Nanjing China - Qingdao China - Shanghai China - Shenyang China - Shenzhen China - Wuhan China - Xian ASIA/PACIFIC China - Xiamen China - Zhuhai India - Bangalore India - New Delhi India - Pune Japan - Osaka Japan - Tokyo Korea - Daegu Korea - Seoul Malaysia - Kuala Lumpur Malaysia - Penang Philippines - Manila Singapore Taiwan - Hsin Chu Taiwan - Kaohsiung Taiwan - Taipei Thailand - Bangkok EUROPE Austria - Wels Denmark - Copenhagen France - Paris Germany - Dusseldorf Germany - Karlsruhe Germany - Munich Italy - Milan Italy - Venice Netherlands - Drunen Poland - Warsaw Spain - Madrid Sweden - Stockholm UK - Wokingham
DN2530 N-Channel, Depletion-Mode, Vertical DMOS FET Features Description
• High-input impedance The DN2530 is a low-threshold, depletion-mode, nor- • Low-input capacitance mally-on transistor that utilizes an advanced vertical • Fast switching speeds DMOS structure and a well-proven silicon-gate manu- • Low on-resistance facturing process. This combination produces a device • Free from secondary breakdown with the power-handling capabilities of bipolar transis- tors, plus the high-input impedance and positive-tem- • Low input and output leakage perature coefficient inherent in Metal-Oxide Semiconductor (MOS) devices. Characteristic of all
Applications
MOS structures, this device is free from thermal run- • Normally-on switches away and thermally-induced secondary breakdown. • Solid state relays Vertical DMOS Field-Effect Transistors (FETs) are ide- • Converters ally suited to a wide range of switching and amplifying • Linear amplifiers applications where high breakdown-voltage, high-input • Constant current sources impedance, low-input capacitance, and fast switching • Power supply circuits speeds are desired. • Telecom
Package Types DRAIN DRAIN SOURCE SOURCE DRAIN GATE GATE TO-92 TO-243AA (SOT-89)
See Table 2-1 for pin information 2016 Microchip Technology Inc. DS20005451A-page 1 Document Outline 1.0 Electrical Characteristics 2.0 Pin Description TABLE 2-1: Pin Description 3.0 Functional Description FIGURE 3-1: Switching Waveforms and Test Circuit FIGURE 3-2: Typical Performance Curves FIGURE 3-3: Typical Performance Curves (continued) 4.0 Packaging Information 4.1 Package Marking Information AMERICAS Corporate Office Atlanta Austin, TX Boston Chicago Cleveland Dallas Detroit Houston, TX Indianapolis Los Angeles New York, NY San Jose, CA Canada - Toronto ASIA/PACIFIC Asia Pacific Office Hong Kong Australia - Sydney China - Beijing China - Chengdu China - Chongqing China - Dongguan China - Hangzhou China - Hong Kong SAR China - Nanjing China - Qingdao China - Shanghai China - Shenyang China - Shenzhen China - Wuhan China - Xian ASIA/PACIFIC China - Xiamen China - Zhuhai India - Bangalore India - New Delhi India - Pune Japan - Osaka Japan - Tokyo Korea - Daegu Korea - Seoul Malaysia - Kuala Lumpur Malaysia - Penang Philippines - Manila Singapore Taiwan - Hsin Chu Taiwan - Kaohsiung Taiwan - Taipei Thailand - Bangkok EUROPE Austria - Wels Denmark - Copenhagen France - Paris Germany - Dusseldorf Germany - Karlsruhe Germany - Munich Italy - Milan Italy - Venice Netherlands - Drunen Poland - Warsaw Spain - Madrid Sweden - Stockholm UK - Wokingham