MCP4901/4911/49212.0TYPICAL PERFORMANCE CURVESNote: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V, VREF = 2.048V, Gain = 2x, RL = 5 k, CL = 100 pF. 0.30.07660.07640.20.07620.10.07600.07580.0756DNL (LSB)-0.10.0754-0.2Absolute DNL (LSB)0.0752-0.30.07501024204830724096-40-20020406080100 120Code (Decimal)Ambient Temperature (ºC)FIGURE 2-1: DNL vs. Code (MCP4921). FIGURE 2-4: Absolute DNL vs. Temperature (MCP4921). 0.20.350.30.10.250.200.15DNL (LSB)0.1-0.1Absolute DNL (LSB)0.05-0.200102420483072409612345Code (Decimal)125C85C25CVoltage Reference (V)FIGURE 2-2: DNL vs. Code and FIGURE 2-5: Absolute DNL vs. Voltage Temperature (MCP4921). Reference (MCP4921). 0.45Ambient Temperature0.34125C852530.220.1100-0.1DNL (LSB)-1INL (LSB)-0.2-2-3-0.3-4-0.4-50102420483072409601024204830724096Code (Decimal)12345.5Code (Decimal)FIGURE 2-3: DNL vs. Code and VREF, FIGURE 2-6: INL vs. Code and Gain=1 (MCP4921). Temperature (MCP4921). 2010 Microchip Technology Inc. DS22248A-page 9 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: SPI Input Timing Data. 2.0 Typical Performance Curves FIGURE 2-1: DNL vs. Code (MCP4921). FIGURE 2-2: DNL vs. Code and Temperature (MCP4921). FIGURE 2-3: DNL vs. Code and VREF, Gain=1 (MCP4921). FIGURE 2-4: Absolute DNL vs. Temperature (MCP4921). FIGURE 2-5: Absolute DNL vs. Voltage Reference (MCP4921). FIGURE 2-6: INL vs. Code and Temperature (MCP4921). FIGURE 2-7: Absolute INL vs. Temperature (MCP4921). FIGURE 2-8: Absolute INL vs. VREF (MCP4921). FIGURE 2-9: INL vs. Code and VREF (MCP4921). FIGURE 2-10: INL vs. Code (MCP4921). FIGURE 2-11: DNL vs. Code and Temperature (MCP4911). FIGURE 2-12: INL vs. Code and Temperature (MCP4911). FIGURE 2-13: DNL vs. Code and Temperature (MCP4901). FIGURE 2-14: INL vs. Code and Temperature (MCP4901). FIGURE 2-15: IDD vs. Temperature and VDD. FIGURE 2-16: IDD Histogram (VDD = 2.7V). FIGURE 2-17: IDD Histogram (VDD = 5.0V). FIGURE 2-18: Shutdown Current vs. Temperature and VDD. FIGURE 2-19: Offset Error vs.Temperature and VDD. FIGURE 2-20: Gain Error vs. Temperature and VDD. FIGURE 2-21: VIN High Threshold vs. Temperature and VDD. FIGURE 2-22: VIN Low Threshold vs. Temperature and VDD. FIGURE 2-23: Input Hysteresis vs. Temperature and VDD. FIGURE 2-24: VREF Input Impedance vs. Temperature and VDD. FIGURE 2-25: VOUT High Limit vs. Temperature and VDD. FIGURE 2-26: VOUT Low Limit vs. Temperature and VDD. FIGURE 2-27: IOUT High Short vs. Temperature and VDD. FIGURE 2-28: IOUT vs. VOUT. Gain = 1. FIGURE 2-29: VOUT Rise Time FIGURE 2-30: VOUT Fall Time. FIGURE 2-31: VOUT Rise Time FIGURE 2-32: VOUT Rise Time FIGURE 2-33: VOUT Rise Time Exit Shutdown. FIGURE 2-34: PSRR vs. Frequency. FIGURE 2-35: Multiplier Mode Bandwidth. FIGURE 2-36: -3 db Bandwidth vs. Worst Codes. FIGURE 2-37: Phase Shift. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Supply Voltage Pins (VDD, VSS) 3.2 Chip Select (CS) 3.3 Serial Clock Input (SCK) 3.4 Serial Data Input (SDI) 3.5 Latch DAC Input (LDAC) 3.6 Analog Output (VOUT) 3.7 Voltage Reference Input (VREF) 3.8 Exposed Thermal Pad (EP) 4.0 General Overview TABLE 4-1: LSb of each device 4.1 DC Accuracy FIGURE 4-1: Example for INL Error. FIGURE 4-2: Example for DNL Accuracy. 4.2 Circuit Descriptions FIGURE 4-3: Typical Transient Response. FIGURE 4-4: Output Stage for Shutdown Mode. 5.0 Serial Interface 5.1 Overview 5.2 Write Command FIGURE 5-1: Write Command for MCP4921 (12-bit DAC). FIGURE 5-2: Write Command for MCP4911 (10-bit DAC). Note: X are don’t care bits. FIGURE 5-3: Write Command for MCP4901(8-bit DAC). Note: X are don’t care bits. 6.0 Typical Applications 6.1 Digital Interface 6.2 Power Supply Considerations FIGURE 6-1: Typical Connection Diagram. 6.3 Layout Considerations 6.4 Single-Supply Operation 6.5 Bipolar Operation 6.6 Selectable Gain and Offset Bipolar Voltage Output Using DAC Devices 6.7 Designing a Double-Precision DAC 6.8 Building Programmable Current Source 6.9 Using Multiplier Mode 7.0 Development support 7.1 Evaluation & Demonstration Boards 8.0 Packaging Information 8.1 Package Marking Information Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Kokomo Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service