MCP4801/4811/48212.0TYPICAL PERFORMANCE CURVESNote: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25°C, VDD = 5V, VSS = 0V, VREF = 2.048V, Gain = 2, RL = 5 k, CL = 100 pF. 0.35Ambient Temperature40.2125C85253)0.12B)SB1LS(0L0LL ( -1DN-0.1IN -2-0.2-3 -4-0.3-50102420483072409601024204830724096Code (Decimal)Code (Decimal)FIGURE 2-1: DNL vs. Code (MCP4821). FIGURE 2-4: INL vs. Code and Temperature (MCP4821). 2.50.22)0.1B S) B(L1.5SLLN0(IL1teDNlu o-0.1s0.5Ab0-0.2-40-2002040608010012001024204830724096Code (Decimal)Ambient Temperature (ºC)125C85C25CFIGURE 2-2: DNL vs. Code and FIGURE 2-5: Absolute INL vs. Temperature (MCP4821). Temperature (MCP4821). 0.076620.0764) B S0.07620(L)0.076SB L0.0758DNL-2teL (0.0756luINo s0.0754-4Ab0.07520.075-6-40-20020406080100 12001024204830724096Ambient Temperature (ºC)Code (Decimal)FIGURE 2-3: Absolute DNL vs. FIGURE 2-6: INL vs. Code (MCP4821). Temperature (MCP4821). Note: Single device graph for illustration of 64 code effect. DS22244B-page 8 2010 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics FIGURE 1-1: SPI Input Timing Data. 2.0 Typical Performance Curves FIGURE 2-1: DNL vs. Code (MCP4821). FIGURE 2-2: DNL vs. Code and Temperature (MCP4821). FIGURE 2-3: Absolute DNL vs. Temperature (MCP4821). FIGURE 2-4: INL vs. Code and Temperature (MCP4821). FIGURE 2-5: Absolute INL vs. Temperature (MCP4821). FIGURE 2-6: INL vs. Code (MCP4821). FIGURE 2-7: DNL vs. Code and Temperature (MCP4811). FIGURE 2-8: INL vs. Code and Temperature (MCP4811). FIGURE 2-9: DNL vs. Code and Temperature (MCP4801). FIGURE 2-10: INL vs. Code and Temperature (MCP4801). FIGURE 2-11: Full-Scale VOUT vs. Ambient Temperature and VDD. Gain = 1x. FIGURE 2-12: Full-Scale VOUT vs. Ambient Temperature and VDD. Gain = 2x. FIGURE 2-13: Output Noise Voltage Density (VREF Noise Density) vs. Frequency. Gain = 1x. FIGURE 2-14: Output Noise Voltage (VREF Noise Voltage) vs. Bandwidth. Gain = 2x. FIGURE 2-15: IDD vs. Temperature and VDD. FIGURE 2-16: IDD Histogram (VDD = 2.7V). FIGURE 2-17: IDD Histogram (VDD = 5.0V). FIGURE 2-18: Hardware Shutdown Current vs. Temperature and VDD. FIGURE 2-19: Software Shutdown Current vs. Temperature and VDD. FIGURE 2-20: Offset Error vs. Temperature and VDD. FIGURE 2-21: Gain Error vs. Temperature and VDD. FIGURE 2-22: VIN High Threshold vs. Temperature and VDD. FIGURE 2-23: VIN Low Threshold vs. Temperature and VDD. FIGURE 2-24: Input Hysteresis vs. Temperature and VDD. FIGURE 2-25: VOUT High Limit vs.Temperature and VDD. FIGURE 2-26: VOUT Low Limit vs. Temperature and VDD. FIGURE 2-27: IOUT High Short vs. Temperature and VDD. FIGURE 2-28: IOUT vs. VOUT. Gain = 2x. FIGURE 2-29: VOUT Rise Time. FIGURE 2-30: VOUT Fall Time. FIGURE 2-31: VOUT Rise Time. FIGURE 2-32: VOUT Rise Time. FIGURE 2-33: VOUT Rise Time Exit Shutdown. FIGURE 2-34: PSRR vs. Frequency. 3.0 Pin descriptions TABLE 3-1: Pin Function Table for MCP4801/4811/4821 3.1 Supply Voltage Pins (VDD, VSS) 3.2 Chip Select (CS) 3.3 Serial Clock Input (SCK) 3.4 Serial Data Input (SDI) 3.5 Latch DAC Input (LDAC) 3.6 Analog Output (VOUT) 3.7 Exposed Thermal Pad (EP) 4.0 General Overview TABLE 4-1: LSb of each device FIGURE 4-1: Example for INL Error. FIGURE 4-2: Example for DNL Error. 4.1 Circuit Descriptions FIGURE 4-3: Typical Transient Response. FIGURE 4-4: Output Stage for Shutdown Mode. 5.0 Serial Interface 5.1 Overview 5.2 Write Command FIGURE 5-1: Write Command for MCP4821 (12-bit DAC). FIGURE 5-2: Write Command for MCP4811 (10-bit DAC). FIGURE 5-3: Write Command for MCP4801 (8-bit DAC). 6.0 Typical Applications 6.1 Digital Interface 6.2 Power Supply Considerations 6.3 Output Noise Considerations FIGURE 6-1: Typical Connection Diagram. 6.4 Layout Considerations 6.5 Single-Supply Operation 6.6 Bipolar Operation 6.7 Selectable Gain and Offset Bipolar Voltage Output 6.8 Designing a Double-Precision DAC 6.9 Building Programmable Current Source 7.0 Development support 7.1 Evaluation & Demonstration Boards 8.0 Packaging Information 8.1 Package Marking Information Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Kokomo Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service