Datasheet MCP41XXX/42XXX (Microchip) - 3

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MCP41XXX/42XXX DC CHARACTERISTICS: 50 k
Ω
VERSION Electrical Characteristics:
Unless otherwise indicated, VDD = +2.7V to 5.5V, TA = -40°C to +85°C (TSSOP devices are only specified at +25°C and +85°C). Typical specifications represent values for VDD = 5V, VSS = 0V, VB = 0V, TA = +25°C.
Parameters Sym Min Typ Max Units Conditions Rheostat Mode
Nominal Resistance R 35 50 65 kΩ TA = +25°C
(Note 1)
Rheostat Differential Non-Linearity R-DNL -1 ±1/4 +1 LSB
Note 2
Rheostat Integral Non-Linearity R-INL -1 ±1/4 +1 LSB
Note 2
Rheostat Tempco ∆RAB/∆T — 800 — ppm/°C Wiper Resistance RW — 125 175 Ω VDD = 5.5V, IW = 1 mA, code 00h RW — 175 250 Ω VDD = 2.7V, IW = 1 mA, code 00h Wiper Current IW -1 — +1 mA Nominal Resistance Match ∆R/R — 0.2 1 %
MCP42050 only
, P0 to P1;TA = +25°C
Potentiometer Divider
Resolution N 8 — — Bits Monotonicity N 8 — — Bits Differential Non-Linearity DNL -1 ±1/4 +1 LSB
Note 3
Integral Non-Linearity INL -1 ±1/4 +1 LSB
Note 3
Voltage Divider Tempco ∆VW/∆T — 1 — ppm/°C Code 80h Full-Scale Error VWFSE -1 -0.25 0 LSB Code FFh, VDD = 5V, see Figure 2-25 VWFSE -1 -0.35 0 LSB Code FFh, VDD = 3V, see Figure 2-25 Zero-Scale Error VWZSE 0 +0.25 +1 LSB Code 00h, VDD = 5V, see Figure 2-25 VWZSE 0 +0.35 +1 LSB Code 00h, VDD = 3V, see Figure 2-25
Resistor Terminals
Voltage Range VA,B,W 0 — VDD
Note 4
Capacitance (CA or CB) — 11 — pF f =1 MHz, Code = 80h, see Figure 2-30 Capacitance CW — 5.6 — pF f =1 MHz, Code = 80h, see Figure 2-30
Dynamic Characteristics (All dynamic characteristics use VDD = 5V)
Bandwidth -3dB BW — 280 — MHz VB = 0V, Measured at Code 80h, Output Load = 30 PF Settling Time tS — 8 — µS VA = VDD,VB = 0V, ±1% Error Band, Transition from Code 00h to Code 80h, Output Load = 30 pF Resistor Noise Voltage eNWB — 20 — nV/√Hz VA = Open, Code 80h, f =1 kHz Crosstalk CT — -95 — dB VA = VDD, VB = 0V
(Note 5 ) Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.
Schmitt Trigger High-Level Input Voltage VIH 0.7VDD — — V Schmitt Trigger Low-Level Input Voltage VIL — — 0.3VDD V Hysteresis of Schmitt Trigger Inputs VHYS — 0.05VDD — Low-Level Output Voltage VOL — — 0.40 V IOL = 2.1 mA, VDD = 5V High-Level Output Voltage VOH VDD - 0.5 — — V IOH = -400 µA, VDD = 5V Input Leakage Current ILI -1 — +1 µA CS = VDD, VIN = VSS or VDD, includes VA SHDN=0 Pin Capacitance (All inputs/outputs) CIN, COUT — 10 — pF VDD = 5.0V, TA = +25°C, fc = 1 MHz
Power Requirements
Operating Voltage Range VDD 2.7 — 5.5 V Supply Current, Active IDDA — 340 500 µA VDD = 5.5V, CS = VSS, fSCK = 10 MHz, SO = Open, Code FFh
(Note 6)
Supply Current, Static IDDS — 0.01 1 µA CS, SHDN, RS = VDD = 5.5V, SO = Open
(Note 6)
Power Supply Sensitivity PSS — 0.0015 0.0035 %/% VDD = 4.5V - 5.5V, VA = 4.5V, Code 80h PSS — 0.0015 0.0035 %/% VDD = 2.7V - 3.3V, VA = 2.7V, Code 80h
Note 1:
VAB = VDD, no connection on wiper.
2:
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. IW = VDD/R for +3V or +5V for 50 kΩ version. See Figure 2-26 for test circuit.
3:
INL and DNL are measured at VW with the device configured in the voltage divider or potentiometer mode. VA = VDD and VB = 0V. DNL specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
4:
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured using Figure 2-25.
5:
Measured at VW pin where the voltage on the adjacent VW pin is swinging full scale.
6:
Supply current is independent of current through the potentiometers. 2003 Microchip Technology Inc. DS11195C-page 3 Document Outline 1.0 Electrical Characteristics Figure 1-1: Detailed Serial interface Timing. Figure 1-2: Reset Timing. Figure 1-3: Software Shutdown Exit Timing. 2.0 Typical Performance Curves Figure 2-1: Normalized Wiper to End Terminal Resistance vs. Code. Figure 2-2: Potentiometer INL Error vs. Code. Figure 2-3: Potentiometer Mode Tempco vs. Code. Figure 2-4: Nominal Resistance 10kW vs. Temperature. Figure 2-5: Nominal Resistance 50kW vs. Temperature. Figure 2-6: Nominal Resistance 100kW vs. Temperature. Figure 2-7: Rheostat INL Error vs. Code. Figure 2-8: Rheostat Mode Tempco vs. Code. Figure 2-9: Static Current vs. Temperature. Figure 2-10: Active Supply Current vs. Temperature. Figure 2-11: Active Supply Current vs. Clock Frequency. Figure 2-12: Reset & Shutdown Pins Current vs. Voltage. Figure 2-13: 10kW Device Wiper Resistance Histogram. Figure 2-14: 50kW, 100kW Device Wiper Resistance Histogram. Figure 2-15: One Position Settling Time. Figure 2-16: Full-Scale Settling Time. Figure 2-17: Digital Feed through vs. Time. Figure 2-18: Gain vs. Frequency for 10kW Potentiometer. Figure 2-19: Gain vs. Frequency for 50kW Potentiometer. Figure 2-20: Gain vs. Frequency for 100kW Potentiometer. Figure 2-21: -3 dB Bandwidths. Figure 2-22: Power Supply Rejection Ratio vs. Frequency. Figure 2-23: 10kW Wiper Resistance vs. Voltage. Figure 2-24: 50kW & 100kW Wiper Resistance vs. Voltage. 2.1 Parametric Test Circuits Figure 2-25: Potentiometer Divider Non- Linearity Error Test Circuit (DNL, INL). Figure 2-26: Resistor Position Non- Linearity Error Test Circuit (Rheostat operation DNL, INL). Figure 2-27: Wiper Resistance Test Circuit. Figure 2-28: Power Supply Sensitivity Test Circuit (PSS, PSRR). Figure 2-29: Gain vs. Frequency Test Circuit. Figure 2-30: Capacitance Test Circuit. 3.0 Pin Descriptions 3.1 PA0, PA1 3.2 PB0, PB1 3.3 PW0, PW1 3.4 Chip Select (CS) 3.5 Serial Clock (SCK) 3.6 Serial Data Input (SI) 3.7 Serial Data Output (SO) (MCP42XXX devices only) 3.8 Reset (RS) (MCP42XXX devices only) 3.9 Shutdown (SHDN) (MCP42XXX devices only) Table 3-1: MCP41XXX Pins Table 3-2: MCP42XXX Pins 4.0 Applications Information Figure 4-1: Block diagram showing the MCP42XXX dual digital potentiometer. Data register 0 and da... 4.1 Modes of Operation Figure 4-2: Two-terminal or rheostat configuration for the digital potentiometer. Acting as a res... Figure 4-3: Three terminal or voltage divider mode. 4.2 Typical Applications Figure 4-4: Single-supply, programmable, inverting gain amplifier using a digital potentiometer. Figure 4-5: Single-supply, programmable, non-inverting gain amplifier. Figure 4-6: Gain vs. Code for inverting and differential amplifier circuits. Figure 4-7: Single Supply programmable differential amplifier using digital potentiometers. Figure 4-8: By changing the values of R1 and R2, the voltage output resolution of this programmab... 4.3 Calculating Resistances Figure 4-9: Potentiometer resistances are a function of code. It should be noted that, when using... Figure 4-10: Example Resistance calculations. 5.0 Serial Interface 5.1 Command Byte 5.2 Writing Data Into Data Registers 5.3 Using The Shutdown Command Figure 5-1: Timing Diagram for Writing Instructions or Data to a Digital Potentiometer. Figure 5-2: Command Byte Format. 5.4 Daisy-Chain Configuration Figure 5-3: Timing Diagram for Daisy-Chain Configuration. Figure 5-4: Daisy-Chain Configuration. 5.5 Reset (RS) Pin Operation 5.6 Shutdown (SHDN) Pin Operation 5.7 Power-up Considerations Table 5-1: Truth Table for Logic Inputs 5.8 Using the MCP41XXX/42XXX in SPI Mode 1,1 Figure 5-5: Timing Diagram for SPI Mode 1,1 Operation. 6.0 Packaging Information 6.1 Package Marking Information