Datasheet MCP6N16 (Microchip) - 10

link to page 9 DS2
MCP6N16 TABLE 1-2: AC ELECTRICAL SPECIFICATIONS (CONTINUED)
0005318A-p
Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = 1.8V to 5.5V, VSS = GND, VCM = VDD/2, VDM = 0V, VREF = VDD/2, VL = VDD/2, RL = 10 kΩ to VL, CL = 60 pF, GDM = GMIN and EN = VDD; see Figures 1-7 and 1-8.
Parameters Sym. Min. Typ. Max. Units GMIN Conditions
age 10
Noise
Input Noise Voltage Density eni — 900 — nV/√Hz 1 f = 500 Hz — 105 — 10 — 45 — 100 Input Noise Voltage Eni — 19 — µVP-P 1 f = 0.1 Hz to 10 Hz — 2.2 — 10 — 0.93 — 100 — 5.9 — 1 f = 0.01 Hz to 1 Hz — 0.69 — 10 — 0.30 — 100 Input Current Noise Density ini — 7 — fA/√Hz all f = 1 kHz Output Noise Voltage Density eno 0 nV/√Hz Output Noise Voltage Eno 0 µVP-P
Amplifier Distortion (Note 2 )
Intermodulation Distortion (AC) IMD — 5 — µVPK all VCM tone = 100 mVPK at 100 Hz
EMI Protection
EMI Rejection Ratio EMIRR — 103 — dB all VIN = 0.1 VPK, f = 400 MHz — 106 — VIN = 0.1 VPK, f = 900 MHz — 106 — VIN = 0.1 VPK, f = 1800 MHz — 111 — VIN = 0.1 VPK, f = 2400 MHz 
Note 1:
The slew rate is limited by the GBWP; the large signal step response is dominated by the small signal bandwidth. 20
2:
These parameters were characterized using the circuit in Figure 1-8. In Figures 2-75 and 2-76, there is an IMD tone at DC, a residual tone at 100 Hz and 14 M other IMD tones and clock tones. ic
3:
High gains behave differently; see
Section 4.4.4 “Offset at Power-Up”
. rochip
4:
tSTR, tSTL, tIRC, tIRD and tOR include some uncertainty due to clock edge timing. T e chnology Inc. Document Outline Zero-Drift Instrumentation Amplifier Features: Typical Applications: Design Aids: Description: Typical Application Circuit Package Types Minimum Gain Options TABLE 1: Key Differentiating Specifications FIGURE 1: Input Offset Voltage vs. Temperature, with GMIN = 1. FIGURE 2: Input Offset Voltage vs. Temperature, with GMIN = 10. FIGURE 3: Input Offset Voltage vs. Temperature, with GMIN = 100. 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Digital Electrical Specifications TABLE 1-4: Temperature Specifications 1.3 Timing Diagrams FIGURE 1-1: Amplifier Start-Up Timing Diagram. FIGURE 1-2: Common Mode Input Overdrive Recovery Timing Diagram. FIGURE 1-3: Differential Mode Input Overdrive Recovery Timing Diagram. FIGURE 1-4: Output Overdrive Recovery Timing Diagram. FIGURE 1-5: POR Timing Diagram. FIGURE 1-6: EN Timing Diagram. 1.4 DC Test Circuits FIGURE 1-7: Simple Test Circuit for Common Mode (Input Offset). TABLE 1-5: Results FIGURE 1-8: Simple Test Circuit for Differential Mode. TABLE 1-6: Selecting RF and RG 1.5 Explanation of DC Error Specifications FIGURE 1-9: Input Offset Error vs. Common Mode Input Voltage. FIGURE 1-10: Differential Input Error vs. Differential Input Voltage. 2.0 Typical Performance Curves 2.1 DC Precision FIGURE 2-1: Input Offset Voltage, with GMIN = 1. FIGURE 2-2: Input Offset Voltage, with GMIN = 10. FIGURE 2-3: Input Offset Voltage, with GMIN = 100. FIGURE 2-4: Input Offset Voltage Drift, with GMIN = 1. FIGURE 2-5: Input Offset Voltage Drift, with GMIN = 10. FIGURE 2-6: Input Offset Voltage Drift, with GMIN = 100. FIGURE 2-7: Quadratic Input Offset Voltage Drift, with GMIN = 1. FIGURE 2-8: Quadratic Input Offset Voltage Drift, with GMIN = 10. FIGURE 2-9: Quadratic Input Offset Voltage Drift, with GMIN = 100. FIGURE 2-10: Input Offset Voltage vs. Output Voltage, with GMIN = 1. FIGURE 2-11: Input Offset Voltage vs. Output Voltage, with GMIN = 10. FIGURE 2-12: Input Offset Voltage vs. Output Voltage, with GMIN = 100. FIGURE 2-13: Input Offset Voltage vs. Power Supply Voltage, with VCM = 0V and GMIN = 1. FIGURE 2-14: Input Offset Voltage vs. Power Supply Voltage, with VCM = 0V and GMIN = 10. FIGURE 2-15: Input Offset Voltage vs. Power Supply Voltage, with VCM = 0V and GMIN = 100. FIGURE 2-16: Input Offset Voltage vs. Power Supply Voltage, with VCM = VDD and GMIN = 1. FIGURE 2-17: Input Offset Voltage vs. Power Supply Voltage, with VCM = VDD and GMIN = 10. FIGURE 2-18: Input Offset Voltage vs. Power Supply Voltage, with VCM = VDD and GMIN = 100. FIGURE 2-19: Input Offset Voltage vs. Common Mode Voltage, with VDD = 1.8V and GMIN = 1. FIGURE 2-20: Input Offset Voltage vs. Common Mode Voltage, with VDD = 1.8V and GMIN = 10. FIGURE 2-21: Input Offset Voltage vs. Common Mode Voltage, with VDD = 1.8V and GMIN = 100. FIGURE 2-22: Input Offset Voltage vs. Common Mode Voltage, with VDD = 5.5V and GMIN = 1. FIGURE 2-23: Input Offset Voltage vs. Common Mode Voltage, with VDD = 5.5V and GMIN = 10. FIGURE 2-24: Input Offset Voltage vs. Common Mode Voltage, with VDD = 5.5V and GMIN = 100. FIGURE 2-25: Input Offset Voltage vs. Reference Voltage, with GMIN = 1. FIGURE 2-26: Input Offset Voltage vs. Reference Voltage, with GMIN = 10. FIGURE 2-27: Input Offset Voltage vs. Reference Voltage, with GMIN = 100. FIGURE 2-28: CMRR, with GMIN = 1. FIGURE 2-29: CMRR, with GMIN = 10. FIGURE 2-30: CMRR, with GMIN = 100. FIGURE 2-31: CMRR2, with GMIN = 1. FIGURE 2-32: CMRR2, with GMIN = 10. FIGURE 2-33: CMRR2, with GMIN = 100. FIGURE 2-34: PSRR, with GMIN = 1. FIGURE 2-35: PSRR, with GMIN = 10. FIGURE 2-36: PSRR, with GMIN = 100. FIGURE 2-37: DC Open-Loop Gain, with GMIN = 1. FIGURE 2-38: DC Open-Loop Gain, with GMIN = 10. FIGURE 2-39: DC Open-Loop Gain, with GMIN = 100. FIGURE 2-40: CMRR vs. Ambient Temperature. FIGURE 2-41: CMRR2 vs. Ambient Temperature. FIGURE 2-42: PSRR vs. Ambient Temperature. FIGURE 2-43: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-44: Input Bias and Offset Currents vs. Common Mode Input Voltage, with TA = +85°C. FIGURE 2-45: Input Bias and Offset Currents vs. Common Mode Input Voltage, with TA = +125°C. FIGURE 2-46: Input Bias and Offset Currents vs. Ambient Temperature, with VDD = 5.5V. FIGURE 2-47: Input Bias Current Magnitude vs. Input Voltage (below VSS). FIGURE 2-48: Gain Error vs. Ambient Temperature. FIGURE 2-49: Gain Error, with GMIN = 1. FIGURE 2-50: Gain Error, with GMIN = 10. FIGURE 2-51: Gain Error, with GMIN = 100. 2.2 Other DC Voltages and Currents FIGURE 2-52: Input Voltage Range Headroom vs. Ambient Temperature. FIGURE 2-53: Normalized Differential Input Voltage Range vs. Ambient Temperature. FIGURE 2-54: Output Voltage Headroom vs. Output Current Magnitude. FIGURE 2-55: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-56: Supply Current vs. Power Supply Voltage. FIGURE 2-57: Supply Current vs. Common Mode Input Voltage. FIGURE 2-58: Output Short-Circuit Current vs. Power Supply Voltage. FIGURE 2-59: Power-On Reset Trip Voltages. FIGURE 2-60: Power-On Reset Trip Voltages vs. Temperature. 2.3 Frequency Response FIGURE 2-61: CMRR vs. Frequency. FIGURE 2-62: PSRR vs. Frequency. FIGURE 2-63: Open-Loop Gain vs. Frequency. FIGURE 2-64: Normalized Gain-Bandwidth Product vs. Ambient Temperature. FIGURE 2-65: Phase Margin vs. Ambient Temperature. FIGURE 2-66: Closed-Loop Output Impedance vs. Frequency. FIGURE 2-67: Gain Peaking vs. Normalized Capacitive Load. FIGURE 2-68: EMIRR vs. Frequency, with VIN = 100 mVPK. FIGURE 2-69: EMIRR vs. Input Voltage, with f = 400 MHz. FIGURE 2-70: EMIRR vs. Input Voltage, with f = 900 MHz. FIGURE 2-71: EMIRR vs. Input Voltage, with f = 1800 MHz. FIGURE 2-72: EMIRR vs. Input Voltage, with f = 2400 MHz. 2.4 Noise FIGURE 2-73: Input Noise Voltage Density and Integrated Input Noise Voltage vs. Frequency. FIGURE 2-74: Input Noise Voltage Density vs. Input Common Mode Voltage. FIGURE 2-75: Intermodulation Distortion vs. Frequency with VCM Disturbance (see Figure 1-8). FIGURE 2-76: Intermodulation Distortion vs. Frequency with VDD Disturbance (see Figure 1-8). FIGURE 2-77: Input Noise Voltage vs. Time, with 1 Hz and 10 Hz Filters and GMIN = 1. FIGURE 2-78: Input Noise Voltage vs. Time, with 1 Hz and 10 Hz Filters and GMIN = 10. FIGURE 2-79: Input Noise Voltage vs. Time, with 1 Hz and 10 Hz Filters and GMIN = 100. 2.5 Time Response FIGURE 2-80: Input Offset Voltage vs. Time with Temperature Change. FIGURE 2-81: Input Offset Voltage vs. Time at Power-Up. FIGURE 2-82: The MCP6N16 Shows No Phase Reversal vs. Common Mode Input Overdrive, with VDD = 5.5V. FIGURE 2-83: The MCP6N16 Shows No Phase Reversal vs. Differential Input Overdrive, with VDD = 5.5V. FIGURE 2-84: The MCP6N16 Shows No Phase Reversal vs. Output Overdrive to VSS. FIGURE 2-85: The MCP6N16 Shows No Phase Reversal vs. Output Overdrive to VDD. FIGURE 2-86: Small Signal Step Response. FIGURE 2-87: Large Signal Step Response. FIGURE 2-88: Differential Input Overdrive Recovery vs. Time. FIGURE 2-89: Differential Input Overdrive Recovery Time vs. Normalized Gain. FIGURE 2-90: Output Overdrive Recovery vs. Time. FIGURE 2-91: Output Overdrive Recovery Time vs. Normalized Gain. FIGURE 2-92: Power Supply On and Off and Output Voltage vs. Time. 2.6 Enable Response FIGURE 2-93: Enable and Output Voltages vs. Time, with VDD = 1.8V. FIGURE 2-94: Enable and Output Voltages vs. Time, with VDD = 5.5V. FIGURE 2-95: Normalized Enable Input Trip and Hysteresis Voltages vs. Ambient Temperature. FIGURE 2-96: Enable Turn-On Time vs. Ambient Temperature. FIGURE 2-97: Power Supply Current in Shutdown vs. Power Supply Voltage. FIGURE 2-98: Output Leakage Current in Shutdown vs. Output Voltage. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Digital Enable Input (EN) 3.2 Analog Signal Inputs (VIP, VIM) 3.3 Power Supply Pins (VSS, VDD) 3.4 Analog Reference Input (VREF) 3.5 Analog Feedback Input (VFG) 3.6 Analog Output (VOUT) 3.7 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Basic Performance FIGURE 4-1: Standard Circuit. FIGURE 4-2: MCP6N16 Block Diagram. FIGURE 4-3: DC Bias Resistors. 4.2 Overview of Zero-Drift Operation FIGURE 4-4: Simplified Zero-Drift INA Functional Diagram. FIGURE 4-5: First Chopping Clock Phase; Simplified Diagram. FIGURE 4-6: Second Chopping Clock Phase; Simplified Diagram. 4.3 Other Functional Blocks FIGURE 4-7: Simplified Analog Input ESD Structures. FIGURE 4-8: Protecting the Analog Inputs Against High Voltages. FIGURE 4-9: Protecting the Analog Inputs Against High Currents. FIGURE 4-10: Input Voltage Ranges. 4.4 Applications Tips FIGURE 4-11: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-12: Recommended RISO Values for Capacitive Loads. FIGURE 4-13: Simple Gain Circuit with Parasitic Capacitances. 4.5 Typical Applications FIGURE 4-14: Difference Amplifier. FIGURE 4-15: Difference Amplifier with Very Large Common Mode Component. FIGURE 4-16: RTD Temperature Sensor. FIGURE 4-17: Wheatstone Bridge Amplifier. FIGURE 4-18: High Side Current Detector. 5.0 Design Aids 5.1 Microchip Advanced Part Selector (MAPS) 5.2 Analog Demonstration Board 5.3 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service