Datasheet Summary SAM D21E, SAM D21G, SAM D21J (Microchip) - 10

32-bit ARM-Based Microcontrollers Table 3-2. Device Variant B Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type
ATSAMD21E15B-AU 32K 4K TQFP32 Tray ATSAMD21E15B-AUT Tape & Reel ATSAMD21E15B-AF Tray ATSAMD21E15B-AFT Tape & Reel ATSAMD21E15B-MU QFN32 Tray ATSAMD21E15B-MUT Tape & Reel ATSAMD21E15B-MF Tray ATSAMD21E15B-MFT Tape & Reel ATSAMD21E15B-UUT WLCSP35 (GJR) Tape & Reel ATSAMD21E16B-AU 64K 8K TQFP32 Tray ATSAMD21E16B-AUT Tape & Reel ATSAMD21E16B-AF Tray ATSAMD21E16B-AFT Tape & Reel ATSAMD21E16B-MU QFN32 Tray ATSAMD21E16B-MUT Tape & Reel ATSAMD21E16B-MF Tray ATSAMD21E16B-MFT Tape & Reel ATSAMD21E16B-UUT 64K 8K WLCSP35 (GJR) Tape & Reel
Table 3-3. Device Variant C Ordering Code FLASH (bytes) SRAM (bytes) Package Carrier Type
ATSAMD21E15C-UUT 32K 4K WLCSP35 (GJS) Tape & Reel ATSAMD21E16C-UUT 64K 8K WLCSP35 (GJS) Tape & Reel © 2017 Microchip Technology Inc.
Datasheet Summary
40001884A-page 10 Document Outline Introduction Features Table of Contents 1. Description 2. Configuration Summary 3. Ordering Information 3.1. SAM D21E 3.2. SAM D21G 3.3. SAM D21J 3.4. Device Identification 4. Block Diagram 5. Pinout 5.1. SAM D21J 5.1.1. QFN64 / TQFP64 5.1.2. UFBGA64 5.2. SAM D21G 5.2.1. QFN48 / TQFP48 5.2.2. WLCSP45 5.3. SAM D21E 5.3.1. QFN32 / TQFP32 5.3.2. WLCSP35 6. Product Mapping 7. Processor And Architecture 7.1. Cortex M0+ Processor 7.1.1. Cortex M0+ Configuration 7.1.2. Cortex-M0+ Peripherals 7.1.3. Cortex-M0+ Address Map 7.1.4. I/O Interface 7.1.4.1. Overview 7.1.4.2. Description 7.2. Nested Vector Interrupt Controller 7.2.1. Overview 7.2.2. Interrupt Line Mapping 7.3. Micro Trace Buffer 7.3.1. Features 7.3.2. Overview 7.4. High-Speed Bus System 7.4.1. Features 7.4.2. Configuration 7.4.3. SRAM Quality of Service 7.5. AHB-APB Bridge 7.6. PAC - Peripheral Access Controller 7.6.1. Overview 7.6.2. Register Description 7.6.2.1. PAC0 Register Description 7.6.2.1.1. Write Protect Clear 7.6.2.1.2. Write Protect Set 7.6.2.2. PAC1 Register Description 7.6.2.2.1. Write Protect Clear 7.6.2.2.2. Write Protect Set 7.6.2.3. PAC2 Register Description 7.6.2.3.1. Write Protect Clear 7.6.2.3.2. Write Protect Set 8. Packaging Information 8.1. Thermal Considerations 8.1.1. Thermal Resistance Data 8.1.2. Junction Temperature 8.2. Package Drawings 8.2.1. 64 pin TQFP 8.2.2. 64 pin QFN 8.2.3. 64-ball UFBGA 8.2.4. 48 pin TQFP 8.2.5. 48 pin QFN 8.2.6. 45-ball WLCSP 8.2.7. 32 pin TQFP 8.2.8. 32 pin QFN 8.2.9. 35 ball WLCSP (Device Variant B) 8.2.10. 35 ball WLCSP (Device Variant C) 8.3. Soldering Profile The Microchip Web Site Customer Change Notification Service Customer Support Product Identification System Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Certified by DNV Worldwide Sales and Service