Datasheet MCP651, MCP651S, MCP652, MCP653, MCP654, MCP655, MCP659 (Microchip)

MCP651/1S/2/3/4/5/9 50 MHz, 200 µV Op Amps with mCal Features: Description:
• Gain-Bandwidth Product: 50 MHz The Microchip Technology Inc. MCP651/1S/2/3/4/5/9 • Slew Rate: 30 V/µs family of high bandwidth and high slew rate operational • Low Input Offset: ±200 µV (maximum) amplifiers features low offset. At power-up, these op amps are self-calibrated using mCal. Some package • Low Input Bias Current: 6 pA (typical) options also provide a Calibration/Chip Select pin • Noise: 7.5 nV/Hz, at 1 MHz (CAL/CS) that supports a Low-Power mode of • Ease-of-Use: operation, with offset calibration at the time normal - Unity-Gain Stable operation is re-started. These amplifiers are optimized - Rail-to-Rail Output for high speed, low noise and distortion, single-supply operation with rail-to-rail output and an input that - Input Range incl. Negative Rail includes the negative rail. - No Phase Reversal This family is offered in single (MCP651 and • Supply Voltage Range: +2.5V to +5.5V MCP651S), single with CAL/CS pin (MCP653), dual • High Output Current: ±100 mA (MCP652), dual with CAL/CS pins (MCP655), quad • Supply Current: 6.0 mA/Ch (typical) (MCP654) and quad with CAL/CS pins (MCP659). All • Low-Power Mode: 5 µA/Ch devices are fully specified from -40°C to +125°C. • Smal Packages: SOT23-5, DFN • Extended Temperature Range: -40°C to +125°C
Typical Application Circuit MCP65X Typical Applications:
VIN VOUT • Driving A/D Converters R • Fast Low-side Current Sensing V L DD/2 • Power Amplifier Control Loops 1 k 100 k • Optical Detector Amplifier High Gain Amplifier (G = 101V/V) • Barcode Scanners • Multi-Pole Active Filter
35%
• Consume r Audio 80 Samples
30%
TA = +25°C VDD = 2.5V and 5.5V
Design Aids: rences 25%
Calibrated at +25°C
ccur 20%
• SPICE Macro Models
f O 15%
• FilterLab® Software
age o
• Microchip Advanced Part Selector (MAPS)
10%
• Analog Demonstration and Evaluation Boards
5% ercent P
- MCP651EV-VOS
0% -100 -80 -60 -40 -20 0 20 40 60 80 100
• Application Notes
Input Offset Voltage (µV) High Gain-Bandwidth Op Amp Portfolio Model Family Channels/Package Gain-Bandwidth VOS (max.) IQ/Ch (typ.)
MCP621/1S/2/3/4/5/9 1, 2, 4 20 MHz 0.2 mV 2.5 mA MCP631/2/3/4/5/9 1, 2, 4 24 MHz 8.0 mV 2.5 mA MCP651/1S/2/3/4/5/9 1, 2, 4 50 MHz 0.2 mV 6.0 mA MCP660/1/2/3/4/5/9 1, 2, 3, 4 60 MHz 8.0 mV 6.0 mA  2009-2014 Microchip Technology Inc. DS20002146D-page 1 Document Outline 50 MHz, 200 µV Op Amps with mCal Features Typical Applications Design Aids Description Typical Application Circuit High Gain-Bandwidth Op Amp Portfolio Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications TABLE 1-1: DC Electrical Specifications TABLE 1-2: AC Electrical Specifications TABLE 1-3: Digital Electrical Specifications TABLE 1-4: Temperature Specifications 1.3 Timing Diagram FIGURE 1-1: Timing Diagram. 1.4 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves 2.1 DC Signal Inputs FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage Repeatability (repeated calibration). FIGURE 2-4: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Low-Input Common Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-7: High-Input Common Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-8: Input Offset Voltage vs. Common Mode Voltage with VDD = 2.5V. FIGURE 2-9: Input Offset Voltage vs. Common Mode Voltage with VDD = 5.5V. FIGURE 2-10: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-11: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-12: Input Bias and Offset Currents vs. Ambient Temperature with VDD = +5.5V. FIGURE 2-13: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +85°C. FIGURE 2-14: Input Bias and Offset Currents vs. Common Mode Input Voltage with TA = +125°C. FIGURE 2-15: Input Bias Current vs. Input Voltage (below VSS). 2.2 Other DC Voltages and Currents FIGURE 2-16: Ratio of Output Voltage Headroom to Output Current. FIGURE 2-17: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-18: Output Short-Circuit Current vs. Power Supply Voltage. FIGURE 2-19: Supply Current vs. Power Supply Voltage. FIGURE 2-20: Supply Current vs. Common Mode Input Voltage. FIGURE 2-21: Power-On Reset Voltages vs. Ambient Temperature. FIGURE 2-22: Normalized Internal Calibration Voltage. FIGURE 2-23: VCAL Input Resistance vs. Temperature. 2.3 Frequency Response FIGURE 2-24: CMRR and PSRR vs. Frequency. FIGURE 2-25: Open-Loop Gain vs. Frequency. FIGURE 2-26: Gain-Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-27: Gain-Bandwidth Product and Phase Margin vs. Common Mode Input Voltage. FIGURE 2-28: Gain-Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-29: Closed-Loop Output Impedance vs. Frequency. FIGURE 2-30: Gain Peaking vs. Normalized Capacitive Load. FIGURE 2-31: Channel-to-Channel Separation vs. Frequency. 2.4 Input Noise and Distortion FIGURE 2-32: Input Noise Voltage Density vs. Frequency. FIGURE 2-33: Input Noise Voltage Density vs. Input Common Mode Voltage with f = 100 Hz. FIGURE 2-34: Input Noise Voltage Density vs. Input Common Mode Voltage with f = 1 MHz. FIGURE 2-35: Input Noise plus Offset vs. Time with 0.1 Hz Filter. FIGURE 2-36: THD+N vs. Frequency. 2.5 Time Response FIGURE 2-37: Non-inverting Small Signal Step Response. FIGURE 2-38: Non-inverting Large Signal Step Response. FIGURE 2-39: Inverting Small Signal Step Response. FIGURE 2-40: Inverting Large Signal Step Response. FIGURE 2-41: The MCP651/1S/2/3/4/5/9 family shows no input phase reversal with overdrive. FIGURE 2-42: Slew Rate vs. Ambient Temperature. FIGURE 2-43: Maximum Output Voltage Swing vs. Frequency. 2.6 Calibration and Chip Select Response FIGURE 2-44: CAL/CS Current vs. Power Supply Voltage. FIGURE 2-45: CAL/CS Voltage, Output Voltage and Supply Current (for Side A) vs. Time with VDD = 2.5V. FIGURE 2-46: CAL/CS Voltage, Output Voltage and Supply Current (for Side A) vs. Time with VDD = 5.5V. FIGURE 2-47: CAL/CS Hysteresis vs. Ambient Temperature. FIGURE 2-48: CAL/CS Turn-On Time vs. Ambient Temperature. FIGURE 2-49: CAL/CS’s Pull-Down Resistor (RPD) vs. Ambient Temperature. FIGURE 2-50: Quiescent Current in Shutdown vs. Power Supply Voltage. FIGURE 2-51: Output Leakage Current vs. Output Voltage. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Calibration Common Mode Voltage Input 3.5 Calibrate/Chip Select Digital Input 3.6 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Calibration and Chip Select FIGURE 4-1: Common-Mode Reference’s Input Circuitry. FIGURE 4-2: Setting VCM with External Resistors. 4.2 Input FIGURE 4-3: Simplified Analog Input ESD Structures. FIGURE 4-4: Protecting the Analog Inputs. FIGURE 4-5: Unity-Gain Voltage Limitations for Linear Operation. 4.3 Rail-to-Rail Output FIGURE 4-6: Output Current. FIGURE 4-7: Diagram for Resistive Load Power Calculations. FIGURE 4-8: Diagram for Capacitive Load Power Calculations. 4.4 Improving Stability FIGURE 4-9: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-10: Recommended RISO Values for Capacitive Loads. FIGURE 4-11: Amplifier with Parasitic Capacitance. FIGURE 4-12: Maximum Recommended RF vs. Gain. 4.5 Power Supply 4.6 High-Speed PCB Layout 4.7 Typical Applications FIGURE 4-13: Power Driver. FIGURE 4-14: Transimpedance Amplifier for an Optical Detector. FIGURE 4-15: H-Bridge Driver. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information 6.2 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service