Datasheet MCP6031, MCP6032, MCP6035, MCP6034 (Microchip) - 7

MCP6031/2/3/4 Note:
Unless otherwise indicated, T ≈ A = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 MΩ to VL, CL = 60 pF and CS is tied low.
1,000 110 105 CMRR (VDD = 1.8V, CMRR (VDD = 5.5V, ensity 100 VCM = -0.3V to 2.1V) V B) CM = -0.3V to 5.8V) e D ) d 95 ( tag Hz 90 /
√
RR M 85 e Vol (nV C 80 R, PSRR (VDD = 1.8V to 5.5V, VCM = VSS) 75 PSR 70 put Nois In 65 100 60
1E-1
0.1
1E+0
1
1E+
10
1 1E
1
+2
00
1E
1
+3
k
1E+4
10k
1E+
100
5
k -50 -25 0 25 50 75 100 125 Frequency (Hz) Ambient Temperature (°C) FIGURE 2-7:
Input Noise Voltage Density
FIGURE 2-10:
Common Mode Rejection vs. Frequency. Ratio, Power Supply Rejection Ratio vs. Ambient Temperature.
200 y 10000 it V 175 DD = 5.5V V ens et CM = VDD 150 1000 e D ffs ) ) 125 ag lt Hz (pA Input Bias Current o
√
100 nd O a ts 100 n e V (nV/ 75 ias is rre u 50 B C t No f = 1 kHz 10 25 pu VDD = 5.5V Input In 0 Input Offset Current .5 0 5 0 5 0 5 0 5 0 5 0 5 0 1 -0 0. 0. 1. 1. 2. 2. 3. 3. 4. 4. 5. 5. 6. 25 45 65 85 105 125 Common Mode Input Voltage (V) Ambient Temperature (°C) FIGURE 2-8:
Input Noise Voltage Density
FIGURE 2-11:
Input Bias, Offset Currents vs. Common Mode Input Voltage. vs. Ambient Temperature.
100 90 PSRR- 10000 VDD = 5.5V 80 A) (dB) 70 t (p R PSRR+ 60 1000 T R A = +125°C S CMRR rren 50 u , P R 40 30 ias C 100 CMR t B 20 10 T V A = +85°C DD = 5.5V Inpu 0 10 0.1 1 10 100 1000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Frequency (Hz) Common Mode Input Voltage (V) FIGURE 2-9:
Common Mode Rejection
FIGURE 2-12:
Input Bias Current vs. Ratio, Power Supply Rejection Ratio vs. Common Mode Input Voltage. Frequency. © 2008 Microchip Technology Inc. DS22041B-page 7 Document Outline 1.0 Electrical Characteristics FIGURE 1-1: Timing Diagram for the CS Pin on the MCP6033. 1.1 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage with VDD = 3.0V. FIGURE 2-2: Input Offset Voltage Drift with VDD = 3.0V and TA £ +85˚C. FIGURE 2-3: Input Offset Voltage Drift with VDD = 3.0V and TA ³ +85˚C. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Frequency. FIGURE 2-10: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Power Supply Voltage with VCM = VDD. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage with VCM = VSS. FIGURE 2-16: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-19: Channel-to-Channel Separation vs. Frequency ( MCP6032/4 only). FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-23: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-24: Output Voltage Swing vs. Frequency. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6031/2/3/4 family shows no phase reversal . FIGURE 2-33: Chip Select (CS) to Amplifier Output Response Time (MCP6033 only). FIGURE 2-34: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 5.5V. FIGURE 2-35: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 3.0V. FIGURE 2-36: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 1.8V. FIGURE 2-37: Closed Loop Output Impedance vs. Frequency. FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Chip Select Digital Input 3.4 Power Supply Pins 4.0 Application Information 4.1 Rail-to-Rail Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Output Loads and Battery Life 4.4 Capacitive Loads FIGURE 4-3: Output resistor, RISO stabilizes large capacitive loads. FIGURE 4-4: Recommended RISO values for Capacitive Loads. 4.5 MCP6033 Chip Select 4.6 Supply Bypass 4.7 Unused Op Amps FIGURE 4-5: Unused Op Amps. 4.8 PCB Surface Leakage FIGURE 4-6: Example Guard Ring Layout for Inverting Gain. 4.9 Application Circuits FIGURE 4-7: High Side Battery Current Sensor. FIGURE 4-8: Precision, Non-inverting Comparator. FIGURE 4-9: Driving the MCP3421 using an R-C Snubber. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 MAPS (Microchip Advanced Part Selector) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information