Datasheet LT3045-1 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | 20V, 500mA, Ultralow Noise, Ultrahigh PSRR Linear Regulator with VIOC Control |
| Páginas / Página | 36 / 5 — ELECTRICAL CHARACTERISTICS Note 6:. Note 10:. Note 7:. Note 11:. Note 8:. … |
| Formato / tamaño de archivo | PDF / 3.3 Mb |
| Idioma del documento | Inglés |
ELECTRICAL CHARACTERISTICS Note 6:. Note 10:. Note 7:. Note 11:. Note 8:. Note 12:. Note 13:. Note 9:. Note 14:. Note 15:
Línea de modelo para esta hoja de datos
Versión de texto del documento
LT3045-1
ELECTRICAL CHARACTERISTICS Note 6:
GND pin current is tested with VIN = VOUT(NOMINAL) and a current temperatures degrade operating lifetimes. Operating lifetime is derated at source load. Therefore, the device is tested while operating in dropout. This junction temperatures greater than 125°C. is the worst-case GND pin current. GND pin current decreases at higher
Note 10:
Parasitic diodes exist internally between the VIOC, ILIM, PG, input voltages. Note that GND pin current does not include SET pin or ILIM PGFB, SET, OUTS, and OUT pins and the GND pin. Do not drive these pins pin current but Quiescent current does include them. more than 0.3V below the GND pin during a fault condition. These pins
Note 7:
SET and OUTS pins are clamped using diodes and two 25Ω series must remain at a voltage more positive than GND during normal operation. resistors. For less than 5ms transients, this clamp circuitry can carry
Note 11:
The current limit programming scale factor is specified while the more than the rated current. Refer to Applications Information for more internal backup current limit is not active. Note that the internal current information. limit has foldback protection for VIN – VOUT differentials greater than 12V.
Note 8:
Adding a capacitor across the SET pin resistor decreases output
Note 12:
The internal back-up current limit circuitry incorporates foldback voltage noise. Adding this capacitor bypasses the SET pin resistor’s protection that decreases current limit for VIN – VOUT > 12V. Some level of thermal noise as well as the reference current’s noise. The output noise output current is provided at all VIN – VOUT differential voltages. Consult the then equals the error amplifier noise. Use of a SET pin bypass capacitor Typical Performance Characteristics graph for current limit vs VIN – VOUT. also increases start-up time.
Note 13:
For output voltages less than 1V, the LT3045-1 requires a 10µA
Note 9:
The LT3045-1 is tested and specified under pulsed load conditions minimum load current for stability. such that TJ ≈ TA. The LT3045-1E is 100% tested at 25°C and performance
Note 14:
Maximum OUT-to-OUTS differential is guaranteed by design. is guaranteed from 0°C to 125°C. Specifications over the –40°C to 125°C operating temperature range are assured by design, characterization, and
Note 15:
The VIOC buffer outputs a voltage equal to VIN – VOUT or correlation with statistical process controls. The LT3045-1I is guaranteed VIN – 1.5V (for VOUT ≤ 1.5V). See Block Diagram and Applications over the full –40°C to 125°C operating temperature range. High junction Information for further information. The VIOC pin’s source current should be set between 10µA and 200µA. 30451fa For more information www.linear.com/LT3045-1 5 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
ELECTRICAL CHARACTERISTICS Note 6:
GND pin current is tested with VIN = VOUT(NOMINAL) and a current temperatures degrade operating lifetimes. Operating lifetime is derated at source load. Therefore, the device is tested while operating in dropout. This junction temperatures greater than 125°C. is the worst-case GND pin current. GND pin current decreases at higher
Note 10:
Parasitic diodes exist internally between the VIOC, ILIM, PG, input voltages. Note that GND pin current does not include SET pin or ILIM PGFB, SET, OUTS, and OUT pins and the GND pin. Do not drive these pins pin current but Quiescent current does include them. more than 0.3V below the GND pin during a fault condition. These pins
Note 7:
SET and OUTS pins are clamped using diodes and two 25Ω series must remain at a voltage more positive than GND during normal operation. resistors. For less than 5ms transients, this clamp circuitry can carry
Note 11:
The current limit programming scale factor is specified while the more than the rated current. Refer to Applications Information for more internal backup current limit is not active. Note that the internal current information. limit has foldback protection for VIN – VOUT differentials greater than 12V.
Note 8:
Adding a capacitor across the SET pin resistor decreases output
Note 12:
The internal back-up current limit circuitry incorporates foldback voltage noise. Adding this capacitor bypasses the SET pin resistor’s protection that decreases current limit for VIN – VOUT > 12V. Some level of thermal noise as well as the reference current’s noise. The output noise output current is provided at all VIN – VOUT differential voltages. Consult the then equals the error amplifier noise. Use of a SET pin bypass capacitor Typical Performance Characteristics graph for current limit vs VIN – VOUT. also increases start-up time.
Note 13:
For output voltages less than 1V, the LT3045-1 requires a 10µA
Note 9:
The LT3045-1 is tested and specified under pulsed load conditions minimum load current for stability. such that TJ ≈ TA. The LT3045-1E is 100% tested at 25°C and performance
Note 14:
Maximum OUT-to-OUTS differential is guaranteed by design. is guaranteed from 0°C to 125°C. Specifications over the –40°C to 125°C operating temperature range are assured by design, characterization, and
Note 15:
The VIOC buffer outputs a voltage equal to VIN – VOUT or correlation with statistical process controls. The LT3045-1I is guaranteed VIN – 1.5V (for VOUT ≤ 1.5V). See Block Diagram and Applications over the full –40°C to 125°C operating temperature range. High junction Information for further information. The VIOC pin’s source current should be set between 10µA and 200µA. 30451fa For more information www.linear.com/LT3045-1 5 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Typical Application Related Parts