Datasheet LTC6990 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | TimerBlox: Voltage Controlled Silicon Oscillator |
| Páginas / Página | 30 / 10 — OPERATION. DIVCODE. Figure 1. Simple Technique for Setting DIVCODE |
| Formato / tamaño de archivo | PDF / 410 Kb |
| Idioma del documento | Inglés |
OPERATION. DIVCODE. Figure 1. Simple Technique for Setting DIVCODE
Línea de modelo para esta hoja de datos
- LTC6990CDCB#PBF LTC6990CDCB#TRMPBF LTC6990CDCB#TRPBF LTC6990CS6#PBF LTC6990CS6#TRMPBF LTC6990CS6#TRPBF LTC6990HDCB#PBF LTC6990HDCB#TRMPBF LTC6990HDCB#TRPBF LTC6990HS6#PBF LTC6990HS6#TRMPBF LTC6990HS6#TRPBF LTC6990IDCB#PBF LTC6990IDCB#TRMPBF LTC6990IDCB#TRPBF LTC6990IS6#PBF LTC6990IS6#TRMPBF LTC6990IS6#TRPBF LTC6990MPS6#PBF LTC6990MPS6#TRMPBF LTC6990MPS6#TRPBF
Versión de texto del documento
LTC6990
OPERATION
The LTC6990 is built around a master oscillator with a
DIVCODE
1MHz maximum frequency. The oscillator is controlled The DIV pin connects to an internal, V+ referenced 4-bit by the SET pin current (ISET) and voltage (VSET), with a A/D converter that monitors the DIV pin voltage (V 1MHz • 50k conversion factor that is accurate to ±0.8% DIV) to determine the DIVCODE value. DIVCODE programs two under typical conditions. settings on the LTC6990: 1 I f SET MASTER = = 1MHz • 50k • 1. DIVCODE determines the output frequency divider tMASTER VSET setting, NDIV. A feedback loop maintains VSET at 1V ±30mV, leaving ISET 2. DIVCODE determines the state of the output when as the primary means of controlling the output frequency. disabled, via the Hi-Z bit. The simplest way to generate ISET is to connect a resistor V (R DIV may be generated by a resistor divider between V+ SET) between SET and GND, such that ISET = VSET/RSET. and GND as shown in Figure 1. The master oscillator equation reduces to: 1 1MHz • 50k f 2.25V TO 5.5V MASTER = = tMASTER RSET V+ From this equation it is clear that V LTC6990 R1 SET drift will not affect the output frequency when using a single program resis- DIV tor (RSET). Error sources are limited to RSET tolerance and R2 the inherent frequency accuracy ∆f GND OUT of the LTC6990. 6990 F01 RSET values between 50k and 800k (equivalent to ISET between 1.25µA and 20µA) produce the best results,
Figure 1. Simple Technique for Setting DIVCODE
although RSET may be reduced to 25k (ISET = 40µA) with reduced accuracy. The LTC6990 includes a programmable frequency divider which can further divide the frequency by 1, 2, 4, 8, 16, 32, 64 or 128 before driving the OUT pin. The divider ratio NDIV is set by a resistor divider attached to the DIV pin. 1 1MHz • 50k I f = • SET OUT = tOUT NDIV VSET With RSET in place of VSET/ISET the equation reduces to: 1 1MHz • 50k f = OUT = tOUT NDIV •RSET 6990fc 10 For more information www.linear.com/LTC6990 Document Outline Features Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Related Parts
OPERATION
The LTC6990 is built around a master oscillator with a
DIVCODE
1MHz maximum frequency. The oscillator is controlled The DIV pin connects to an internal, V+ referenced 4-bit by the SET pin current (ISET) and voltage (VSET), with a A/D converter that monitors the DIV pin voltage (V 1MHz • 50k conversion factor that is accurate to ±0.8% DIV) to determine the DIVCODE value. DIVCODE programs two under typical conditions. settings on the LTC6990: 1 I f SET MASTER = = 1MHz • 50k • 1. DIVCODE determines the output frequency divider tMASTER VSET setting, NDIV. A feedback loop maintains VSET at 1V ±30mV, leaving ISET 2. DIVCODE determines the state of the output when as the primary means of controlling the output frequency. disabled, via the Hi-Z bit. The simplest way to generate ISET is to connect a resistor V (R DIV may be generated by a resistor divider between V+ SET) between SET and GND, such that ISET = VSET/RSET. and GND as shown in Figure 1. The master oscillator equation reduces to: 1 1MHz • 50k f 2.25V TO 5.5V MASTER = = tMASTER RSET V+ From this equation it is clear that V LTC6990 R1 SET drift will not affect the output frequency when using a single program resis- DIV tor (RSET). Error sources are limited to RSET tolerance and R2 the inherent frequency accuracy ∆f GND OUT of the LTC6990. 6990 F01 RSET values between 50k and 800k (equivalent to ISET between 1.25µA and 20µA) produce the best results,
Figure 1. Simple Technique for Setting DIVCODE
although RSET may be reduced to 25k (ISET = 40µA) with reduced accuracy. The LTC6990 includes a programmable frequency divider which can further divide the frequency by 1, 2, 4, 8, 16, 32, 64 or 128 before driving the OUT pin. The divider ratio NDIV is set by a resistor divider attached to the DIV pin. 1 1MHz • 50k I f = • SET OUT = tOUT NDIV VSET With RSET in place of VSET/ISET the equation reduces to: 1 1MHz • 50k f = OUT = tOUT NDIV •RSET 6990fc 10 For more information www.linear.com/LTC6990 Document Outline Features Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Related Parts