Datasheet AD640 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | DC-Coupled Demodulating 120 MHz Logarithmic Amplifier |
| Páginas / Página | 20 / 5 — AD640. ABSOLUTE MAXIMUM RATINGS*. CHIP DIMENSIONS AND. BONDING DIAGRAM. … |
| Revisión | D |
| Formato / tamaño de archivo | PDF / 439 Kb |
| Idioma del documento | Inglés |
AD640. ABSOLUTE MAXIMUM RATINGS*. CHIP DIMENSIONS AND. BONDING DIAGRAM. ESD CAUTION. CONNECTION DIAGRAMS
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AD640
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AD640
(continued from page 1)
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . 6. The low input offset voltage of 50 µV (200 µV max) ensures ±7.5 V Input Voltage (Pin 1 or Pin 20 to COM) . –3 V to +300 mV good accuracy for low level dc inputs. Attenuator Input Voltage (Pin 5 to Pin 3/4) . ± 4 V 7. Thermal recovery “tails,” which can obscure the response Storage Temperature Range D, E . –65°C to +150°C when a small signal immediately follows a high level input, Storage Temperature Range N, P . –65°C to +125°C have been minimized by special attention to design details. Ambient Temperature Range, Rated Performance 8. The noise spectral density of 2 nV/√Hz results in a noise floor of Industrial, AD640B . –40°C to +85°C ~23 µV rms (–80 dBm) at a bandwidth of 100 MHz. The dy- Military, AD640T . –55°C to +125°C namic range using cascaded AD640s can be extended to 95 dB Commercial, AD640J . 0°C to +70°C by the inclusion of a simple filter between the two devices. Lead Temperature Range (Soldering 60 sec) . +300°C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the
CHIP DIMENSIONS AND
device at these or any other conditions above those indicated in the operational
BONDING DIAGRAM
section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Dimensions shown in inches and (mm).
ESD CAUTION CONNECTION DIAGRAMS 20-Lead Ceramic SBDIP (D) Packag 20-Lead PLCC (P) Package e 20-Terminal Ceramic LCC (E) Package 20-Lead Plastic DIP (N) Package SIG –IN 1 20 SIG +IN ATN COM ATN LO SIG –IN SIG +IN ATN OUT ATN COM ATN LO SIG –IN SIG +IN ATN OUT ATN LO 2 19 ATN OUT 3 2 3 2 1 20 19 1 20 19 ATN COM 3 18 CKT COM ATN COM 4 18 CKT COM PIN 1 ATN COM 4 18 CKT COM ATN COM 4 17 RG1 IDENTIFIER ATN IN 5 17 RG1 ATN IN 5 17 RG1 ATN IN 5 16 AD640 RG0 AD640 AD640 BL1 6 16 RG0 BL1 6 16 RG0 TOP VIEW TOP VIEW BL1 6 15 TOP VIEW RG2 (Not to Scale) –V 7 15 –V 7 (Not to Scale) 15 RG2 S (Not to Scale) RG2 S –V 7 14 S LOG OUT ITC 8 14 LOG OUT ITC 8 14 LOG OUT ITC 8 13 LOG COM 9 10 11 12 13 9 10 11 12 13 S BL2 9 12 +VS S BL2 +V SIG –OUT 10 11 SIG +OUT BL2 +V SIG –OUT SIG +OUT LOG COM SIG –OUT SIG +OUT LOG COM
–4– REV. D Document Outline AD640-SPECIFICATIONS DC Specifications AC Specifications Thermal Characteristics ABSOLUTE MAXIMUM RATINGS TYPICAL DC PERFORMANCE CHARACTERISTICS TYPICAL AC PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
(continued from page 1)
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . 6. The low input offset voltage of 50 µV (200 µV max) ensures ±7.5 V Input Voltage (Pin 1 or Pin 20 to COM) . –3 V to +300 mV good accuracy for low level dc inputs. Attenuator Input Voltage (Pin 5 to Pin 3/4) . ± 4 V 7. Thermal recovery “tails,” which can obscure the response Storage Temperature Range D, E . –65°C to +150°C when a small signal immediately follows a high level input, Storage Temperature Range N, P . –65°C to +125°C have been minimized by special attention to design details. Ambient Temperature Range, Rated Performance 8. The noise spectral density of 2 nV/√Hz results in a noise floor of Industrial, AD640B . –40°C to +85°C ~23 µV rms (–80 dBm) at a bandwidth of 100 MHz. The dy- Military, AD640T . –55°C to +125°C namic range using cascaded AD640s can be extended to 95 dB Commercial, AD640J . 0°C to +70°C by the inclusion of a simple filter between the two devices. Lead Temperature Range (Soldering 60 sec) . +300°C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the
CHIP DIMENSIONS AND
device at these or any other conditions above those indicated in the operational
BONDING DIAGRAM
section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Dimensions shown in inches and (mm).
ESD CAUTION CONNECTION DIAGRAMS 20-Lead Ceramic SBDIP (D) Packag 20-Lead PLCC (P) Package e 20-Terminal Ceramic LCC (E) Package 20-Lead Plastic DIP (N) Package SIG –IN 1 20 SIG +IN ATN COM ATN LO SIG –IN SIG +IN ATN OUT ATN COM ATN LO SIG –IN SIG +IN ATN OUT ATN LO 2 19 ATN OUT 3 2 3 2 1 20 19 1 20 19 ATN COM 3 18 CKT COM ATN COM 4 18 CKT COM PIN 1 ATN COM 4 18 CKT COM ATN COM 4 17 RG1 IDENTIFIER ATN IN 5 17 RG1 ATN IN 5 17 RG1 ATN IN 5 16 AD640 RG0 AD640 AD640 BL1 6 16 RG0 BL1 6 16 RG0 TOP VIEW TOP VIEW BL1 6 15 TOP VIEW RG2 (Not to Scale) –V 7 15 –V 7 (Not to Scale) 15 RG2 S (Not to Scale) RG2 S –V 7 14 S LOG OUT ITC 8 14 LOG OUT ITC 8 14 LOG OUT ITC 8 13 LOG COM 9 10 11 12 13 9 10 11 12 13 S BL2 9 12 +VS S BL2 +V SIG –OUT 10 11 SIG +OUT BL2 +V SIG –OUT SIG +OUT LOG COM SIG –OUT SIG +OUT LOG COM
–4– REV. D Document Outline AD640-SPECIFICATIONS DC Specifications AC Specifications Thermal Characteristics ABSOLUTE MAXIMUM RATINGS TYPICAL DC PERFORMANCE CHARACTERISTICS TYPICAL AC PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE