Datasheet ADL5502 (Analog Devices)

450 MHz to 6000 MHz Crest Factor Detector ADL5502 FEATURES FUNCTIONAL BLOCK DIAGRAM VPOS True rms response detector Envelope peak hold output ADL5502 INTERNAL 1kΩ 4nF FILTERING Excellent temperature stability FLTR ±0.25 dB rms detection accuracy vs. temperature 100Ω ±0.25 dB envelope detection accuracy vs. temperature; RMS CORE VRMS over the top 25 dB of the input range RFIN BUFFERS Over 35 dB input power dynamic range, inclusive of crest factor 100Ω PEAK/ PEAK ENVELOPE RF bandwidths from 450 MHz to 6 GHz ENBL Envelope bandwidths of 10 MHz CNTL
01
500 Ω input impedance
0 1-
COMM
63
Single-supply operation: 2.5 V to 3.3 V
07 Figure 1.
Low power: 3 mA at 3 V supply RoHS-compliant part PEAK RF INPUT VRMS APPLICATIONS Power and envelope measurement of W-CDMA, CDMA2000, and QPSK-/QAM-based OFDM, and other complex modulation waveforms RF transmitter or receiver power and envelope measurement CNTL ENV TRACK PEAK HOLD
02 0 1-
1µs/DIV
63 07 Figure 2.
GENERAL DESCRIPTION
The ADL5502 is a mean-responding (true rms) power detector The ADL5502 is a highly accurate, easy to use means of in combination with an envelope detector to accurately determine determining the rms and peak to the average value of complex the crest factor of a modulated signal. It can be used in high waveforms. It can be used for crest factor measurements of both frequency receiver and transmitter signal chains from 450 MHz simple and complex waveforms but is particularly useful for to 6 GHz with envelope bandwidths over 10 MHz. Requiring measuring high crest factor (high peak-to-rms ratio) signals, only a single supply between 2.5 V and 3.3 V, the detector draws such as W-CDMA, CDMA2000, and QPSK-/QAM-based less than 3 mA. The input is internally ac-coupled and has a OFDM waveforms. The peak hold function allows the capture nominal input impedance of 500 Ω. of short peaks in the envelope with lower sampling rate ADCs. The rms output is a linear-responding dc voltage with a conversion The crest factor detector operates from −40°C to +85°C and is gain of 1.8 V/V rms at 900 MHz. The peak envelope output with a available in an 8-ball, 1.5 mm × 1.5 mm wafer-level chip scale conversion gain of 1.2 V/V is toggled for peak hold with less package. It is fabricated on a high fT silicon BiCMOS process. than 1% output voltage droop in over 1 ms.
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2008–2011 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION RMS CIRCUIT DESCRIPTION AND FILTERING FILTERING ENVELOPE PEAK-HOLD CIRCUIT OUTPUT BUFFERS MEASURING THE CREST FACTOR APPLICATIONS INFORMATION BASIC CONNECTIONS RF INPUT INTERFACING Resistive Tap RF Input Multiple RF Inputs LINEARITY Output Swing VRMS Output Offset OUTPUT DRIVE CAPABILITY AND BUFFERING SELECTING THE SQUARE-DOMAIN FILTER AND OUTPUT LOW-PASS FILTER POWER CONSUMPTION, ENABLE, AND POWER-ON/POWER-OFF RESPONSE TIME DEVICE CALIBRATION AND ERROR CALCULATION CALIBRATION FOR IMPROVED ACCURACY CALCULATION OF CREST FACTOR (CF) DRIFT OVER A REDUCED TEMPERATURE RANGE OPERATION AT HIGH FREQUENCIES DEVICE HANDLING EVALUATION BOARD Operating in Peak-Hold Mode Land Pattern and Soldering Information OUTLINE DIMENSIONS ORDERING GUIDE