Datasheet AD8230 (Analog Devices) - 7

AD8230 TYPICAL PERFORMANCE CHARACTERISTICS TOTAL NUMBER OF 20 SAMPLES = 2839 FROM 3 LOTS NORMALIZED FOR VCM = 0V 500 15 ) 10 400 TI R V µ ( 5 S E E 300 G A PL 0 M LT O SA 200 T V –5 E FS F O –10 100
04
–15
0 7 3- -00 06
0
5 0 063
–20
05
–9 –6 –3 0 3 6 9 –6 –4 –2 0 2 4 6 OFFSET VOLTAGE (µV RTI) COMMON-MODE VOLTAGE (V)
Figure 4. Offset Voltage (RTI) Distribution at ±5 V, CM = 0 V, TA = 25°C Figure 7. Offset Voltage (RTI) vs. Common-Mode Voltage, VS = ±5 V
40 TOTAL NUMBER OF SAMPLES = 300 FROM 3 LOTS 20 NORMALIZED FOR VCM = 0V 35 15 30 ) TI 10 R 25 V µ ( 5 S E E G L 20 A 0 MP LT O SA 15 T V –5 E 10 FS F O –10 5
5 00
–15
8 3- -00 06
0
05 063
–20
05
–50 –30 –10 10 30 50 –10 –8 –6 –4 –2 0 2 4 6 8 10 OFFSET VOLTAGE DRIFT (nV/°C) COMMON-MODE VOLTAGE (V)
Figure 5. Offset Voltage (RTI) Drift Distribution Figure 8. Offset Voltage (RTI) vs. Common-Mode Voltage, VS = ±8 V
0 0 –2 –1 –4 I) T VS = ±5V –2 –6 ) V V R µ µ –8 E ( –3 E ( G G A T –10 LTA L V –4 S = ±8V VO VO –12 ET S –5 SET –14 F ±5V SUPPLY F F F O O –6 –16 –18
6 00
–7 ±8V SUPPLY
9 3- -00 06
–20
05 063
–8
05
–50 –30 –10 10 30 50 70 90 110 130 150 0 1 2 3 4 5 6 TEMPERATURE (°C) SOURCE IMPEDANCE (kΩ)
Figure 6. Offset Voltage (RTI) vs. Temperature Figure 9. Offset Voltage (RTI) vs. Source Impedance, 1 μF Across Input Pins Rev. B | Page 6 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SETTING THE GAIN LEVEL-SHIFTING THE OUTPUT SOURCE IMPEDANCE AND INPUT SETTLING TIME INPUT VOLTAGE RANGE INPUT PROTECTION POWER SUPPLY BYPASSING POWER SUPPLY BYPASSING FOR MULTIPLE CHANNEL SYSTEMS LAYOUT APPLICATIONS OUTLINE DIMENSIONS ORDERING GUIDE