Datasheet AD8429 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | 1 nV/√Hz Low Noise Instrumentation Amplifier |
| Páginas / Página | 21 / 10 — Data Sheet. AD8429. 160. 3.0. G = 1k. 140. G = 100. IOS 2.5. G = 10. 120. … |
| Revisión | A |
| Formato / tamaño de archivo | PDF / 735 Kb |
| Idioma del documento | Inglés |
Data Sheet. AD8429. 160. 3.0. G = 1k. 140. G = 100. IOS 2.5. G = 10. 120. A) n. G = 1. 2.0. 100. BANDWIDTH. LIMITED. 1.5. CURR. RR (. CURRE. T E S. 1.0. T U. INP. –10
Versión de texto del documento
Data Sheet AD8429 160 40 3.0 I G = 1k B+ I 140 B– G = 100 30 IOS 2.5 G = 10 A) 120 A) n (n ( G = 1 20 2.0 NT 100 NT E B) BANDWIDTH d LIMITED 80 10 1.5 CURR RR ( CURRE T E S CM AS F 60 BI F 0 1.0 O UT T U 40 INP INP –10 0.5 20 0 –20 0
9
1 10 100 1k 10k 100k 1M
10 1
–45 –30 –15 0 15 30 45 60 75 90 105 120 135
01 0- 0-
FREQUENCY (Hz)
73
TEMPERATURE (°C)
73 09 09 Figure 10. CMRR vs. Frequency Figure 13. Input Bias Current and Input Offset Current vs. Temperature
140 40 G = 100 GAIN = 1 G = 1k 30 120 G = 10 20 100 10 G = 1 ) ) 0 B /V 80 d V BANDWIDTH µ R ( LIMITED –10 R RR ( 60 CM –20 CM 40 –30 –40 20 –50 NORMALIZED AT 25°C 0 –60
4
1 10 100 1k 10k 100k 1M
1 1
–40 –25 –10 5 20 35 50 65 80 95 110 125
1 1 1 0- 0- 73
FREQUENCY (Hz)
73
TEMPERATURE (°C)
09 09 Figure 11. CMRR vs. Frequency, 1 kΩ Source Imbalance Figure 14. CMRR vs. Temperature (G = 1), Normalized at 25°C
12 10.0 V) µ 9.5 E ( 10 G 9.0 A T L A) 8.5 8 VO (m NT 8.0 SET E F F 6 7.5 O T CURR Y 7.0 PU L N 4 P I N UP 6.5 S E I G N 6.0 2 A H C 5.5 0 5.0 0 100 200 300 400 500 600 700
2 2 1 1
–50 –30 –10 10 30 50 70 90 110 130
02 0- 0-
WARM-UP TIME (s)
73
TEMPERATURE (°C)
73 09 09 Figure 12. Change in Input Offset Voltage (VOSI) vs. Warm-Up Time Figure 15. Supply Current vs. Temperature (G = 1) Rev. A | Page 9 of 20 Document Outline FEATURES APPLICATIONS PIN CONNECTION DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE RG Power Dissipation REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION Input Voltages Beyond the Rails Large Differential Input Voltage at High Gain IMAX RADIO FREQUENCY INTERFERENCE (RFI) CALCULATING THE NOISE OF THE INPUT STAGE Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation OUTLINE DIMENSIONS ORDERING GUIDE
9
1 10 100 1k 10k 100k 1M
10 1
–45 –30 –15 0 15 30 45 60 75 90 105 120 135
01 0- 0-
FREQUENCY (Hz)
73
TEMPERATURE (°C)
73 09 09 Figure 10. CMRR vs. Frequency Figure 13. Input Bias Current and Input Offset Current vs. Temperature
140 40 G = 100 GAIN = 1 G = 1k 30 120 G = 10 20 100 10 G = 1 ) ) 0 B /V 80 d V BANDWIDTH µ R ( LIMITED –10 R RR ( 60 CM –20 CM 40 –30 –40 20 –50 NORMALIZED AT 25°C 0 –60
4
1 10 100 1k 10k 100k 1M
1 1
–40 –25 –10 5 20 35 50 65 80 95 110 125
1 1 1 0- 0- 73
FREQUENCY (Hz)
73
TEMPERATURE (°C)
09 09 Figure 11. CMRR vs. Frequency, 1 kΩ Source Imbalance Figure 14. CMRR vs. Temperature (G = 1), Normalized at 25°C
12 10.0 V) µ 9.5 E ( 10 G 9.0 A T L A) 8.5 8 VO (m NT 8.0 SET E F F 6 7.5 O T CURR Y 7.0 PU L N 4 P I N UP 6.5 S E I G N 6.0 2 A H C 5.5 0 5.0 0 100 200 300 400 500 600 700
2 2 1 1
–50 –30 –10 10 30 50 70 90 110 130
02 0- 0-
WARM-UP TIME (s)
73
TEMPERATURE (°C)
73 09 09 Figure 12. Change in Input Offset Voltage (VOSI) vs. Warm-Up Time Figure 15. Supply Current vs. Temperature (G = 1) Rev. A | Page 9 of 20 Document Outline FEATURES APPLICATIONS PIN CONNECTION DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE RG Power Dissipation REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION Input Voltages Beyond the Rails Large Differential Input Voltage at High Gain IMAX RADIO FREQUENCY INTERFERENCE (RFI) CALCULATING THE NOISE OF THE INPUT STAGE Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation OUTLINE DIMENSIONS ORDERING GUIDE