Datasheet ADA4930-1/ADA4930-2 (Analog Devices) - 2
| Fabricante | Analog Devices |
| Descripción | Ultralow Noise Drivers for Low Voltage ADCs |
| Páginas / Página | 25 / 2 — ADA4930-1/ADA4930-2. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. … |
| Revisión | D |
| Formato / tamaño de archivo | PDF / 633 Kb |
| Idioma del documento | Inglés |
ADA4930-1/ADA4930-2. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 5/2017—Rev. B to Rev. C. 1/2015—Rev. A to Rev. B
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ADA4930-1/ADA4930-2 Data Sheet TABLE OF CONTENTS
Features .. 1 Test Circuits ... 15 Applications ... 1 Operational Description .. 16 General Description ... 1 Definition of Terms .. 16 Functional Block Diagrams ... 1 Theory of Operation .. 17 Revision History ... 2 Analyzing an Application Circuit .. 17 Specifications ... 3 Setting the Closed-Loop Gain .. 17 3.3 V Operation .. 3 Estimating the Output Noise Voltage .. 17 3.3 V V Impact of Mismatches in the Feedback Networks ... 18 OCM to VO, cm Performance ... 4 3.3 V General Performance ... 4 Input Common-Mode Voltage Range ... 18 5 V Operation ... 5 Minimum RG Value .. 19 5 V V Setting the Output Common-Mode Voltage .. 19 OCM to VO, cm Performance .. 6 5 V General Performance .. 6 Calculating the Input Impedance for an Application Circuit ... 19 Absolute Maximum Ratings .. 7 Layout, Grounding, and Bypassing .. 23 Thermal Resistance .. 7 High Performance ADC Driving ... 24 Maximum Power Dissipation ... 7 Outline Dimensions ... 25 ESD Caution .. 7 Ordering Guide .. 25 Pin Configurations and Function Descriptions ... 8 Typical Performance Characteristics ... 9
REVISION HISTORY 5/2017—Rev. B to Rev. C 1/2015—Rev. A to Rev. B
Changes to Figure 5 and Figure 6 ... 8 Updated Outline Dimensions ... 25 Changes to Input Common-Mode Adjustment with DC Biased Changes to Ordering Guide .. 25 Source Section .. 21 Changes to High Performance ADC Driving Section
10/2010—Rev. 0 to Rev. A
and Figure 60 .. 24 Changes to General Description Section ... 1 Updated Outline Dimensions ... 25 Changes to Ordering Guide .. 25
10/2010—Revision 0: Initial Version
Rev. C | Page 2 of 25 Document Outline Features Applications General Description Functional Block Diagrams Revision History Specifications 3.3 V Operation 3.3 V VOCM to VO, cm Performance 3.3 V General Performance 5 V Operation 5 V VOCM to VO, cm Performance 5 V General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Operational Description Definition of Terms Differential Voltage Common-Mode Voltage Balance Theory of Operation Analyzing an Application Circuit Setting the Closed-Loop Gain Estimating the Output Noise Voltage Impact of Mismatches in the Feedback Networks Input Common-Mode Voltage Range Minimum RG Value Setting the Output Common-Mode Voltage Calculating the Input Impedance for an Application Circuit Terminating a Single-Ended Input Terminating a Single-Ended Input in a Single-Supply Applications Input Common-Mode Adjustment with DC Biased Source Input Common-Mode Adjustment with Resistors Layout, Grounding, and Bypassing High Performance ADC Driving Outline Dimensions Ordering Guide
ADA4930-1/ADA4930-2 Data Sheet TABLE OF CONTENTS
Features .. 1 Test Circuits ... 15 Applications ... 1 Operational Description .. 16 General Description ... 1 Definition of Terms .. 16 Functional Block Diagrams ... 1 Theory of Operation .. 17 Revision History ... 2 Analyzing an Application Circuit .. 17 Specifications ... 3 Setting the Closed-Loop Gain .. 17 3.3 V Operation .. 3 Estimating the Output Noise Voltage .. 17 3.3 V V Impact of Mismatches in the Feedback Networks ... 18 OCM to VO, cm Performance ... 4 3.3 V General Performance ... 4 Input Common-Mode Voltage Range ... 18 5 V Operation ... 5 Minimum RG Value .. 19 5 V V Setting the Output Common-Mode Voltage .. 19 OCM to VO, cm Performance .. 6 5 V General Performance .. 6 Calculating the Input Impedance for an Application Circuit ... 19 Absolute Maximum Ratings .. 7 Layout, Grounding, and Bypassing .. 23 Thermal Resistance .. 7 High Performance ADC Driving ... 24 Maximum Power Dissipation ... 7 Outline Dimensions ... 25 ESD Caution .. 7 Ordering Guide .. 25 Pin Configurations and Function Descriptions ... 8 Typical Performance Characteristics ... 9
REVISION HISTORY 5/2017—Rev. B to Rev. C 1/2015—Rev. A to Rev. B
Changes to Figure 5 and Figure 6 ... 8 Updated Outline Dimensions ... 25 Changes to Input Common-Mode Adjustment with DC Biased Changes to Ordering Guide .. 25 Source Section .. 21 Changes to High Performance ADC Driving Section
10/2010—Rev. 0 to Rev. A
and Figure 60 .. 24 Changes to General Description Section ... 1 Updated Outline Dimensions ... 25 Changes to Ordering Guide .. 25
10/2010—Revision 0: Initial Version
Rev. C | Page 2 of 25 Document Outline Features Applications General Description Functional Block Diagrams Revision History Specifications 3.3 V Operation 3.3 V VOCM to VO, cm Performance 3.3 V General Performance 5 V Operation 5 V VOCM to VO, cm Performance 5 V General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Operational Description Definition of Terms Differential Voltage Common-Mode Voltage Balance Theory of Operation Analyzing an Application Circuit Setting the Closed-Loop Gain Estimating the Output Noise Voltage Impact of Mismatches in the Feedback Networks Input Common-Mode Voltage Range Minimum RG Value Setting the Output Common-Mode Voltage Calculating the Input Impedance for an Application Circuit Terminating a Single-Ended Input Terminating a Single-Ended Input in a Single-Supply Applications Input Common-Mode Adjustment with DC Biased Source Input Common-Mode Adjustment with Resistors Layout, Grounding, and Bypassing High Performance ADC Driving Outline Dimensions Ordering Guide