Datasheet ADL5567 (Analog Devices) - 9

FabricanteAnalog Devices
Descripción4.3 GHz, Ultrahigh Dynamic Range, Dual Differential Amplifier
Páginas / Página25 / 9 — Data Sheet. ADL5567. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. 1 L. …
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Data Sheet. ADL5567. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. 1 L. VIN1 1. 18 VON1. VIP1 2. 17 VOP1. NC 3. NC 4. TOP VIEW. 15 NC

Data Sheet ADL5567 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 L VIN1 1 18 VON1 VIP1 2 17 VOP1 NC 3 NC 4 TOP VIEW 15 NC

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Data Sheet ADL5567 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 1 L M 1 1 B O C NC PM EN VC VC NC 24 23 22 21 20 19 VIN1 1 18 VON1 VIP1 2 17 VOP1 NC 3 16 ADL5567 NC NC 4 TOP VIEW 15 NC (Not to Scale) VIP2 5 14 VOP2 VIN2 6 13 VON2 7 8 9 10 11 12 2 2 2 2 NC M C NC PM NBL O VC E VC NOTES 1. NC = NO CONNECT. THESE PINS SHOULD BE CONNECTED TO GROUND. 2. THE EXPOSED PAD IS INTERNALLY CONNECTED TO
2
GND AND MUST BE SOLDERED TO A LOW IMPEDANCE
00 8-
GROUND PLANE.
85 13 Figure 2. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 VIN1 Negative Side of Balanced Differential Inputs for Amplifier 1. This pin is biased to VVCC1/2, and is typically ac- coupled. 2 VIP1 Positive Side of Balanced Differential Inputs for Amplifier 1. This pin is biased to VVCC1/2, and is typically ac- coupled. 3, 4, 7, 12, 15, NC No Functional Connection. Connect these pins to ground. 16, 19, 24 5 VIP2 Positive Side of Balanced Differential Inputs for Amplifier 2. This pin is biased to VVCC2/2, and is typically ac- coupled. 6 VIN2 Negative Side of Balanced Differential Inputs for Amplifier 2. This pin is biased to VVCC2/2, and is typically ac- coupled. 8 PM2 Power Mode Control for Amplifier 2. This pin is internally pulled down to GND through a 30 kΩ resistor. A logic low on this pin sets the device to high performance mode, and a logic high (2.1 V < VPM2 < 3.3 V) sets the device to low power mode. 9 ENBL2 Enable for Amplifier 2. This pin is internally pulled up to about 2.8 V. A logic high on this pin (2.1 V < VENBL2 < 3.3 V) enables the device. 10 VCOM2 Common-Mode Voltage. A voltage applied to this pin sets the common-mode voltage of the inputs and outputs of Amplifier 2. If left open, VVCOM2 = VCC2/2. Decouple this pin to ground with a 0.1 μF capacitor. 11 VCC2 Positive Supply for Amplifier 2. 13 VON2 Negative Side of Balanced Differential Outputs for Amplifier 2. This pin is biased to VVCOM2, and is typically ac- coupled. 14 VOP2 Positive Side of Balanced Differential Outputs for Amplifier 2. This pin is biased to VVCOM2, and is typically ac- coupled. 17 VOP1 Positive Side of Balanced Differential Outputs for Amplifier 1. This pin is biased to VVCOM1, and is typically ac- coupled. 18 VON1 Negative Side of Balanced Differential Outputs for Amplifier 1. This pin is biased to VVCOM1, and is typically ac- coupled. 20 VCC1 Positive Supply for Amplifier 1. 21 VCOM1 Common-Mode Voltage. A voltage applied to this pin sets the common-mode voltage of the inputs and outputs of Amplifier 1. If left open, VVCOM1 = VCC1/2. Decouple this pin ground with a 0.1 μF capacitor. 22 ENBL1 Enable for Amplifier 1. This pin is internally pulled up to about 2.8 V. A logic high on this pin (2.1 V < VENBL1 < 3.45 V) enables the device. 23 PM1 Power Mode Control for Amplifier 1. This pin is internally pulled down to GND through a 30 kΩ resistor. A logic low on this pin sets the device to high performance mode, and a logic high (2.1 V < VPM1 < 3.45 V) sets the device to low power mode. EP GND Exposed Pad. The exposed pad is internally connected to GND and must be soldered to a low impedance ground plane. Rev. 0 | Page 7 of 23 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS INPUT AND OUTPUT INTERFACING Single-Ended Input to Differential Output INPUT AND OUTPUT EQUIVALENT CIRCUITS GAIN ADJUSTMENT AND INTERFACING EFFECT OF LOAD CAPACITANCE ADC INTERFACING SOLDERING INFORMATION AND RECOMMENDED LAND PATTERN EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE