Datasheet AD558 (Analog Devices) - 6

FabricanteAnalog Devices
DescripciónDACPORT Low Cost, Complete µP-Compatible 8-Bit DAC
Páginas / Página10 / 6 — Applications–AD558. OUTPUT. AMP. VOUT. 500. 604. 40k. 14k. TIMING AND …
RevisiónB
Formato / tamaño de archivoPDF / 1.1 Mb
Idioma del documentoInglés

Applications–AD558. OUTPUT. AMP. VOUT. 500. 604. 40k. 14k. TIMING AND CONTROL. GND. GROUNDING AND BYPASSING*

Applications–AD558 OUTPUT AMP VOUT 500 604 40k 14k TIMING AND CONTROL GND GROUNDING AND BYPASSING*

Línea de modelo para esta hoja de datos

Versión de texto del documento

Applications–AD558
The only consideration in selecting a supply voltage is that, in
OUTPUT AMP
order to be able to use the 0 V to 10 V output range, the power supply voltage must be between +11.4 V and +16.5 V. If, how-
16 VOUT
ever, the 0 V to 2.56 V range is to be used, power consumption
500

604

15
will be minimized by utilizing the lowest available supply voltage
40k
Ω (above +4.5 V).
14 14k

2k

TIMING AND CONTROL 13 GND
The AD558 has data input latches that simplify interface to 8- and 16-bit data buses. These latches are controlled by Chip Figure 4. 10.24 V Full-Scale Connection Enable (CE) and Chip Select (CS) inputs. CE and CS are inter- nally “NORed” so that the latches transmit input data to the NOTE: Decreasing the scale by putting a resistor in series with GND DAC section when both CE and CS are at Logic “0”. If the ap- will not work properly due to the code-dependent currents in GND. plication does not involve a data bus, a “00” condition allows Adjusting offset by injecting dc at GND is not recommended for the for direct operation of the DAC. When either CE or CS go to same reason. Logic “1”, the input data is latched into the registers and held until both CE and CS return to “0”. (Unused CE or CS inputs
GROUNDING AND BYPASSING*
should be tied to ground.) The truth table is given in Table I. All precision converter products require careful application of The logic function is also shown in Figure 6. good grounding practices to maintain full rated performance. Because the AD558 is intended for application in microcom-
Table I. AD558 Control Logic Truth Table
puter systems where digital noise is prevalent, special care must be taken to assure that its inherent precision is realized.
Latch
The AD558 has two ground (common) pins; this minimizes
Input Data CE CS DAC Data Condition
ground drops and noise in the analog signal path. Figure 5 0 0 0 0 “Transparent” shows how the ground connections should be made. 1 0 0 1 “Transparent” 0 g 0 0 Latching
OUTPUT
1 g 0 1 Latching
AMP V
0 0 g 0 Latching
OUT 16
1 0 g 1 Latching
VOUT SENSE
X 1 X Previous Data Latched
15 (SEE NEXT
X X 1 Previous Data Latched
VOUT SELECT 14 PAGE) RL
NOTES
GND
X = Does not matter.
13
g = Logic Threshold at Positive-Going Transition.
TO SYSTEM GND 12 TO SYSTEM GND GND (SEE TEXT) 0.1
µ
F 11 TO SYSTEM VCC +VCC
Figure 5. Recommended Grounding and Bypassing It is often advisable to maintain separate analog and digital grounds throughout a complete system, tying them common in one place only. If the common tie-point is remote and acciden- tal disconnection of that one common tie-point occurs due to card removal with power on, a large differential voltage between the two commons could develop. To protect devices that inter- face to both digital and analog parts of the system, such as the Figure 6. AD558 Control Logic Function AD558, it is recommended that common ground tie-points In a level-triggered latch such as that in the AD558 there is an should be provided at each such device. If only one system interaction between data setup and hold times and the width of ground can be connected directly to the AD558, it is recom- the enable pulse. In an effort to reduce the time required to test mended that analog common be selected. all possible combinations in production, the AD558 is tested with tDS = tW = 200 ns at 25°C and 270 ns at TMIN and TMAX,
POWER SUPPLY CONSIDERATIONS
with tDH = 10 ns at all temperatures. Failure to comply with The AD558 is designed to operate from a single positive power these specifications may result in data not being latched properly. supply voltage. Specified performance is achieved for any supply Figure 7 shows the timing for the data and control signals; CE voltage between +4.5 V and +16.5 V. This makes the AD558 and CS are identical in timing as well as in function. ideal for battery-operated, portable, automotive or digital main- frame applications. *For additional insight, “An IC Amplifier Users’ Guide to Decoupling, Grounding and Making Things Go Right For A change,” is available at no charge from any Analog Devices Sales Office. REV. B –5–