AD7874TERMINOLOGYPIN CONFIGURATIONSACQUISITION TIME Acquisition Time is the time required for the output of the DIP and SOIC track/hold amplifiers to reach their final values, within ± 1/2 LSB, after the falling edge of INT (the point at which the track/ holds return to track mode). This includes switch delay time, V128VIN1IN4 slewing time and settling time for a full-scale voltage change. V227VIN2IN3V326 VDDSSAPERTURE DELAYINT425REF OUT Aperture Delay is defined as the time required by the internal CONVST524REF IN switches to disconnect the hold capacitors from the inputs. This RD623AGND produces an effective delay in sample timing. It is measured by AD7874CS722DB0 (LSB) applying a step input and adjusting the CONVST input position TOP VIEWCLK821DB1 until the output code follows the step input change. (Not to Scale)V920DB2DDAPERTURE DELAY MATCHINGDB11 (MSB)1019DB3 Aperture Delay Matching is the maximum deviation in aperture DB101118DB4 delays across the four on-chip track/hold amplifiers. DB91217DB5DB81316DB6APERTURE JITTERDGND1415DB7 Aperture Jitter is the uncertainty in aperture delay caused by internal noise and variation of switching thresholds with signal level. LCCCDROOP RATEDDIN2IN1IN4IN3SSINTVVVVVV Droop Rate is the change in the held analog voltage resulting 432128 27 26 from leakage currents. CONVST525REF OUTCHANNEL-TO-CHANNEL ISOLATIONRD624 REF INCS7AD7874 Channel-to-Channel Isolation is a measure of the level of 23 AGNDTOP VIEW crosstalk between channels. It is measured by applying a full- CLK822 DB0 (LSB)(Not to Scale)921 scale 1 kHz signal to the other three inputs. The figure given is VDB1DDDB11 (MSB) 1020DB2 the worst case across all four channels. DB10 1119DB3SNR, THD, IMD12 13 14 15 16 17 18 See DYNAMIC SPECIFICATIONS section. DB9DB8DB7DB6DB5DB4DGND –4– REV. C