Datasheet AD7874 (Analog Devices) - 3

AD7874–SPECIFICATIONS (VDD = +5 V, VSS = –5 V, AGND = DGND = 0 V, REF IN = +3 V, fCLK = 2.5 MHz external. All specifications TMIN to TMAX unless otherwise noted.) Parameter A Version B Version S Version Units Test Conditions/Comments
SAMPLE-AND-HOLD Acquisition Time2 to 0.01% 2 2 2 µs max Droop Rate2, 3 1 1 2 mV/ms max –3 dB Small Signal Bandwidth3 500 500 500 kHz typ VIN = 500 mV p-p Aperture Delay2 0 0 0 ns min 40 40 40 ns max Aperture Jitter2, 3 200 200 200 ps typ Aperture Delay Matching2 4 4 4 ns max SAMPLE-AND-HOLD AND ADC DYNAMIC PERFORMANCE Signal-to-Noise Ratio 70 71 70 dB min fIN = 10 kHz Sine Wave, fSAMPLE = 29 kHz Total Harmonic Distortion –78 –80 –78 dB max fIN = 10 kHz Sine Wave, fSAMPLE = 29 kHz Peak Harmonic or Spurious Noise –78 –80 –78 dB max fIN = 10 kHz Sine Wave, fSAMPLE = 29 kHz Intermodulation Distortion fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 29 kHz 2nd Order Terms –80 –80 –80 dB max 3rd Order Terms –80 –80 –80 dB max Channel-to-Channel Isolation2 –80 –80 –80 dB max DC ACCURACY Resolution 12 12 12 Bits Relative Accuracy ±1 ±1/2 ±1 LSB max Differential Nonlinearity ±1 ±1 ±1 LSB max No Missing Codes Guaranteed Positive Full-Scale Error4 ±5 ±5 ±5 LSB max Any Channel Negative Full-Scale Error4 ±5 ±5 ±5 LSB max Any Channel Full-Scale Error Match 5 5 5 LSB max Between Channels Bipolar Zero Error ±5 ±5 ±5 LSB max Any Channel Bipolar Zero Error Match 4 4 4 LSB max Between Channels ANALOG INPUTS Input Voltage Range ±10 ±10 ±10 Volts Input Current ±600 ±600 ±600 µA max REFERENCE OUTPUTS REF OUT 3 3 3 V nom REF OUT Error @ +25°C ±0.33 ±0.33 ±0.33 % max T ± MIN to TMAX 1 ±1 ±1 % max REF OUT Temperature Coefficient ±35 ±35 ±35 ppm/°C typ Reference Load Change ±1 ±1 ±2 mV max Reference Load Current Change (0–500 µA) Reference Load Should Not Be Changed During Conversion REFERENCE INPUT Input Voltage Range 2.85/3.15 2.85/3.15 2.85/3.15 V min/V max 3 V ± 5% Input Current ±1 ±1 ±1 µA max Input Capacitance3 10 10 10 pF max LOGIC INPUTS Input High Voltage, VINH 2.4 2.4 2.4 V min VDD = 5 V ± 5% Input Low Voltage, VINL 0.8 0.8 0.8 V max VDD = 5 V ± 5% Input Current, I ± IN 10 ±10 ±10 µA max VIN = 0 V to VDD Input Capacitance, C 3 IN 10 10 10 pF max LOGIC OUTPUTS Output High Voltage, VOH 4.0 4.0 4.0 V min VDD = 5 V ± 5%; ISOURCE = 40 µA Output Low Voltage, VOL 0.4 0.4 0.4 V max VDD = 5 V ± 5%; ISINK = 1–6 mA DB0–DB11 Floating-State Leakage Current ±10 ±10 ±10 µA max VIN = 0 V to VDD Floating-State Output Capacitance 10 10 10 pF max Output Coding 2s COMPLEMENT POWER REQUIREMENTS VDD +5 +5 +5 V nom ±5% for Specified Performance VSS –5 –5 –5 V nom ±5% for Specified Performance IDD 18 18 18 mA max CS = RD = CONVST = +5 V; Typically 12 mA ISS 12 12 12 mA max CS = RD = CONVST = +5 V; Typically 8 mA Power Dissipation 150 150 150 mW max CS = RD = CONVST = +5 V; Typically 100 mW NOTES 1Temperature ranges are as follows: A, B Versions: –40°C to +85°C; S Version: –55°C to +125°C. 2See Terminology. 3Sample tested @ +25°C to ensure compliance. 4Measured with respect to the REF IN voltage and includes bipolar offset error. 5For capacitive loads greater than 50 pF a series resistor is required. Specifications subject to change without notice. –2– REV. C