Datasheet AD7722 (Analog Devices) - 3
Fabricante | Analog Devices |
Descripción | 16-Bit, 195 kSPS CMOS, Sigma-Delta ADC |
Páginas / Página | 25 / 3 — AD7722–SPECIFICATIONS1 (AVDD = AVDD1 = 5 V. 5%; DVDD = 5 V. 5%; AGND = … |
Revisión | C |
Formato / tamaño de archivo | PDF / 478 Kb |
Idioma del documento | Inglés |
AD7722–SPECIFICATIONS1 (AVDD = AVDD1 = 5 V. 5%; DVDD = 5 V. 5%; AGND = AGND1 = DGND = 0 V;
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AD7722–SPECIFICATIONS1 (AVDD = AVDD1 = 5 V 5%; DVDD = 5 V 5%; AGND = AGND1 = DGND = 0 V; UNI = Logic Low or High; fCLKIN = 12.5 MHz; fS = 195.3 kSPS; REF2 = 2.5 V; TA = TMIN to TMAX, unless otherwise noted.) A Version Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC SPECIFICATIONS2 Bipolar Mode, UNI = VINH VCM = 2.5 V, VIN(+) = VIN(–) =1.25 V p-p, or VIN(–) = 1.25 V, VIN(+) = 0 V to 2.5 V Signal-to-(Noise + Distortion)3 Input Bandwidth 0 kHz–90.625 kHz 86/84.5 90 dB Input Bandwidth 0 kHz–100 kHz, fCLKIN = 14 MHz 84.5/83 dB Total Harmonic Distortion3 Input Bandwidth 0 kHz–90.625 kHz –90/–88 dB Input Bandwidth 0 kHz–100 kHz, fCLKIN = 14 MHz –88/–86 dB Spurious-Free Dynamic Range Input Bandwidth 0 kHz–90.625 kHz –90 dB Input Bandwidth 0 kHz–100 kHz, fCLKIN = 14 MHz –88 dB Unipolar Mode, UNI = VINL VIN(–) = 0 V, VIN(+) = 0 V to 2.5 V Signal-to-(Noise + Distortion)3 Input Bandwidth 0 kHz–90.625 kHz 84.5/83 88 dB Total Harmonic Distortion3 Input Bandwidth 0 kHz–97.65 kHz –89/–87 dB Spurious-Free Dynamic Range Input Bandwidth 0 kHz–97.65 kHz –90 dB Intermodulation Distortion –93 dB AC CMRR VIN(+) = VIN(–) = 2.5 V p-p VCM = 1.25 V to 3.75 V, 20 kHz 96 dB Digital Filter Response Pass-Band Ripple 0 kHz to 90.625 kHz ±0.005 dB Cutoff Frequency 96.92 kHz Stop-Band Attenuation 104.6875 kHz to 12.395 MHz 90 dB ANALOG INPUTS Full-Scale Input Span VIN(+) – VIN(–) Bipolar Mode UNI = VINH –VREF2/2 +VREF2/2 V Unipolar Mode UNI = VINL 0 VREF2 V Absolute Input Voltage VIN(+) and VIN(–) 0 AVDD V Input Sampling Capacitance 2 pF Input Sampling Rate Guaranteed by Design 2 × fCLKIN Hz Differential Input Impedance 1/(4 × 10-9)fCLKIN kΩ CLOCK CLKIN Mark Space Ratio 45 55 % REFERENCE REF1 Output Voltage 2.32 2.47 2.62 V REF1 Output Voltage Drift 60 ppm/°C REF1 Output Impedance 3 kΩ Reference Buffer Offset Voltage Offset between REF1 and REF2 ±12 mV Using Internal Reference REF2 Output Voltage 2.32 2.47 2.62 V REF2 Output Voltage Drift 60 ppm/°C Using External Reference REF2 Input Impedance REF1 = AGND 1/(16 × 10−9)fCLKIN kΩ External Reference Voltage Range Applied to REF1 or REF2 2.32 2.5 2.62 V STATIC PERFORMANCE Resolution 16 Bits Differential Nonlinearity Guaranteed Monotonic ±0.5 ±1 LSB Integral Nonlinearity ±2 LSB After Calibration Offset Error4 ±3 mV Gain Error4, 5 ±0.6 % FSR Without Calibration Offset Error ±6 mV Gain Error5 ±0.6 % FSR Offset Error Drift ±1 LSB/°C Gain Error Drift REF2 Is an Ideal Reference, REF1 = AGND Unipolar Mode ±1 LSB/°C Bipolar Mode ±0.5 LSB/°C –2– REV. B Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE TIMING SPECIFICATIONS PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION PARALLEL MODE PIN FUNCTION DESCRIPTIONS SERIAL MODE PIN FUNCTION DESCRIPTIONS TERMINOLOGY Signal-to-Noise Plus Distortion Ratio (S/(N+D)) Total Harmonic Distortion (THD) Spurious-Free Dynamic Range (SFDR) Intermodulation Distortion Pass-Band Ripple Pass-Band Frequency Cutoff Frequency Stop-Band Frequency Stop-Band Attenuation Integral Nonlinearity Differential Nonlinearity Common-Mode Rejection Ratio Unipolar Offset Error Bipolar Offset Error Gain Error Typical Performance Characteristics CIRCUIT DESCRIPTION APPLYING THE AD7722 Analog Input Range Differential Inputs Applying the Reference Input Circuits Clock Generation Varying the Master Clock SYSTEM SYNCHRONIZATION AND CONTROL SYNC Input DVAL Reset Input Power-On Reset Offset and Gain Calibration DATA INTERFACING Parallel Interface SERIAL INTERFACE 2-Channel Multiplexed Operation Serial Interfacing to DSPs OUTLINE DIMENSIONS Revision History