AD7819PIN FUNCTION DESCRIPTIONSPin No.MnemonicDescription 1 VREF Reference Input, 1.2 V to VDD. 2 VIN Analog Input, 0 V to VREF. 3 GND Analog and Digital Ground. 4 CONVST Convert Start. A low-to-high transition on this pin initiates a 1.5 µs pulse on an internally generated CONVST signal. A high-to-low transition on this line initiates the conversion process if the internal CONVST signal is low. Depending on the signal on this pin at the end of a conversion, the AD7819 automatically powers down. 5 CS Chip Select. This is a logic input. CS is used in conjunction with RD to enable outputs. 6 RD Read Pin. This is a logic input. When CS is low and RD goes low, the DB7–DB0 leave their high impedance state and data is driven onto the data bus. 7 BUSY ADC Busy Signal. This is a logic output. This signal goes logic high during the conversion process. 8–15 DB0–DB7 Data Bit 0 to 7. These outputs are three-state TTL-compatible. 16 VDD Positive power supply voltage, 2.7 V to 5.5 V. PIN CONFIGURATIONDIP/SOICV116REFVDDV215 DB7INGND 314 DB6AD7819CONVST 413 DB5TOP VIEWCS 512 DB4(Not to Scale)RD 611 DB3BUSY 710 DB2DB0 89 DB1 –4– REV. B