AD9280PIN CONFIGURATION28-Lead Wide Body (SSOP)AVSS 128 AVDDDRVDD 227 AIN DNC 326 VREF DNC 425 REFBSD0 524AD9280REFBFD1 6TOP VIEW23 MODED2 7 (Not to Scale) 22 REFTF D3 821 REFTSD4 920 CLAMPIND5 1019 CLAMPD6 1118 REFSENSED7 1217 STBYOTR 1316 THREE-STATEDRVSS 1415 CLK'NC = DO NOT CONNECTPIN FUNCTION DESCRIPTIONSSSOP Pin No.NameDescription 1 AVSS Analog Ground 2 DRVDD Digital Driver Supply 3 DNC Do Not Connect 4 DNC Do Not Connect 5 D0 Bit 0 6 D1 Bit 1 7 D2 Bit 2 8 D3 Bit 3 9 D4 Bit 4 10 D5 Bit 5 11 D6 Bit 6 12 D7 Bit 7, Most Significant Bit 13 OTR Out-of-Range Indicator 14 DRVSS Digital Ground 15 CLK Clock Input 16 THREE-STATE HI: High Impedance State. LO: Normal Operation 17 STBY HI: Power-Down Mode. LO: Normal Operation 18 REFSENSE Reference Select 19 CLAMP HI: Enable Clamp Mode. LO: No Clamp 20 CLAMPIN Clamp Reference Input 21 REFTS Top Reference 22 REFTF Top Reference Decoupling 23 MODE Mode Select 24 REFBF Bottom Reference Decoupling 25 REFBS Bottom Reference 26 VREF Internal Reference Output 27 AIN Analog Input 28 AVDD Analog Supply REV. E –5– Document Outline FEATURES PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM AD9280-SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL CHARACTERIZATION CURVES APPLYING THE AD9280 Theory of Operation Operational Modes Summary of Modes Voltage Reference Reference Buffer Analog Input Special Input and Reference Overview REFERENCE OPERATION Internal Reference Operation External Reference Operation STANDBY OPERATION CLAMP OPERATION Clamp Circuit Example DRIVING THE ANALOG INPUT DIFFERENTIAL INPUT OPERATION AD876-8 MODE OF OPERATION CLOCK INPUT DIGITAL INPUTS AND OUTPUTS APPLICATIONS Direct IF Down Conversion Using the AD9280 Grounding and Layout Rules Digital Outputs Three-State Outputs OUTLINE DIMENSIONS Ordering Guide REVISION HISTORY