Datasheet AD7822, AD7825, AD7829 (Analog Devices) - 7

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AD7822/AD7825/AD7829 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS DB2 1 28 DB3 DB1 2 27 DB4 DB2 1 24 DB3 DB0 3 26 DB5 DB1 2 23 DB4 CONVST 4 25 DB6 DB2 1 20 DB3 DB0 3 22 DB5 CS 5 24 DB7 DB1 2 19 DB4 CONVST 4 21 DB6 RD 6 23 AGND DB0 3 18 DB5 AD7829 CS 5 AD7825 20 DB7 DGND 7 22 VDD TOP VIEW CONVST 4 17 DB6 RD 6 TOP VIEW 19 AGND EOC 8 (Not to Scale) 21 VREF IN/OUT CS AD7822 5 16 DB7 (Not to Scale) TOP VIEW DGND 7 18 VDD A2 9 20 VMID RD 6 15 AGND (Not to Scale) EOC 8 17 V A1 10 19 V DGND REF IN/OUT IN1 7 14 VDD A1 9 16 V A0 11 18 V EOC 8 MID 13 V IN2 REF IN/OUT A0 V 12 17 PD 10 15 V V 9 12 V IN1 IN8 IN3 MID NC 10 PD V 13 16 11 V
3
11 14 V IN1 IN2
0 4
IN7 VIN4
05 0 0 1-
V
-00
13 V 14 15 V
1-
NC = NO CONNECT IN4 12 VIN3 IN6 IN5
32 21 32 01 13 0 01 Figure 3. Pin Configuration Figure 4. Pin Configuration Figure 5. Pin Configuration
Table 4. Pin Function Descriptions Mnemonic Description
VIN1 to VIN8 Analog Input Channels. The AD7822 has a single input channel; the AD7825 and AD7829 have four and eight analog input channels, respectively. The inputs have an input span of 2.5 V and 2 V depending on the supply voltage (VDD). This span can be centered anywhere in the range AGND to VDD using the VMID pin. The default input range (VMID unconnected) is AGND to 2 V (VDD = 3 V ± 10%) or AGND to 2.5 V (VDD = 5 V ± 10%). See the Analog Input section of the data sheet for more information. VDD Positive Supply Voltage, 3 V ± 10% and 5 V ± 10%. AGND Analog Ground. Ground reference for track-and-hold, comparators, reference circuit, and multiplexer. DGND Digital Ground. Ground reference for digital circuitry. CONVST Logic Input Signal. The convert start signal initiates an 8-bit analog-to-digital conversion on the falling edge of this signal. The falling edge of this signal places the track-and-hold in hold mode. The track-and-hold goes into track mode again 120 ns after the start of a conversion. The state of the CONVST signal is checked at the end of a conversion. If it is logic low, the AD7822/ AD7825/AD7829 powers down (see the Operating Modes section of the data sheet). EOC Logic Output. The end-of-conversion signal indicates when a conversion has finished. The signal can be used to interrupt a microcontroller when a conversion has finished or latch data into a gate array (see the Parallel Interface section). CS Logic Input Signal. The chip select signal is used to enable the parallel port of the AD7822/AD7825/AD7829. This is necessary if the ADC is sharing a common data bus with another device. PD Logic Input. The power-down pin is present on the AD7822 and AD7825 only. Bringing the PD pin low places the AD7822 and AD7825 in power-down mode. The ADCs power up when PD is brought logic high again. RD Logic Input Signal. The read signal is used to take the output buffers out of their high impedance state and drive data onto the data bus. The signal is internally gated with the CS signal. Both RD and CS must be logic low to enable the data bus. A0 to A2 Channel Address Inputs. The address of the next multiplexer channel must be present on these inputs when the RD signal goes low. DB0 to DB7 Data Output Lines. They are normally held in a high impedance state. Data is driven onto the data bus when both RD and CS go active low. VREF IN/OUT Analog Input and Output. An external reference can be connected to the AD7822/AD7825/AD7829 at this pin. The on-chip reference is also available at this pin. When using the internal reference, this pin can be left unconnected or, in some cases, it can be decoupled to AGND with a 0.1 μF capacitor. VMID The VMID pin, if connected, is used to center the analog input span anywhere in the range of AGND to VDD (see the Analog Input section). Rev. C | Page 7 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY CIRCUIT INFORMATION CIRCUIT DESCRIPTION TYPICAL CONNECTION DIAGRAM ADC TRANSFER FUNCTION ANALOG INPUT POWER-UP TIMES POWER VS. THROUGHPUT OPERATING MODES PARALLEL INTERFACE MICROPROCESSOR INTERFACING AD7822/AD7825/AD7829 TO 8051 AD7822/AD7825/AD7829 TO PIC16C6x/PIC16C7x AD7822/AD7825/AD7829 TO ADSP-21xx INTERFACING MULTIPLEXER ADDRESS INPUTS AD7822 STANDALONE OPERATION OUTLINE DIMENSIONS ORDERING GUIDE