link to page 10 link to page 44 AD9260DIGITAL SPECIFICATIONS AVDD = +5 V, DVDD = +5 V, TMIN to TMAX unless otherwise noted. Table 8. ParameterAD9260Unit CLOCK1 AND LOGIC INPUTS High Level Input Voltage (DVDD = +5 V) +3.5 V min (DVDD = +3 V) +2.1 V max Low Level Input Voltage (DVDD = +5 V) +1.0 V min (DVDD = +3 V) +0.9 V max High Level Input Current (VIN = DVDD) ± 10 µA max Low Level Input Current (VIN = 0 V) ± 10 µA max Input Capacitance 5 pF typ LOGIC OUTPUTS (with DRVDD = 5 V) High Level Output Voltage (IOH = 50 µA) +4.5 V min High Level Output Voltage (IOH = 0.5 mA) +2.4 V min Low Level Output Voltage2 (IOL = 0.3 mA) +0.4 V max Low Level Output Voltage (IOL = 50 µA) +0.1 V max Output Capacitance 5 pF typ LOGIC OUTPUTS (with DRVDD = 3 V) High Level Output Voltage (IOH = 50 µA) +2.4 V min Low Level Output Voltage (IOL = 50 µA) +0.7 V max 1 Since CLK is referenced to AVDD, +5 V logic input levels only apply. 2 The AD9260 is not guaranteed to meet VOL = 0.4 V max for standard TTL load of IOL = 1.6 mA. S1S2tCANALOG INPUTtCLtCHINPUT CLOCKttDIDSDATA OUTPUTtOEtHDAVttDAVODREADCS 00581-C-008 Figure 8. Timing Diagram Rev. C | Page 9 of 44 Document Outline FEATURES PRODUCT DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS CLOCK INPUT FREQUENCY RANGE DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL FILTER CHARACTERISTICS DIGITAL FILTER CHARACTERISTICS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION TERMINOLOGY PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TYPICAL AC CHARACTERIZATION CURVES VS. DECIMATION MODE TYPICAL AC CHARACTERIZATION CURVES FOR 8× MODE TYPICAL AC CHARACTERIZATION CURVES FOR 4× MODE TYPICAL AC CHARACTERIZATION CURVES FOR 2× MODE TYPICAL AC CHARACTERIZATION CURVES FOR 1× MODE TYPICAL AC CHARACTERIZATION CURVES ADDITIONAL AC CHARACTERIZATION CURVES THEORY OF OPERATION ANALOG INPUT AND REFERENCE OVERVIEW INPUT SPAN INPUT COMPLIANCE RANGE ANALOG INPUT OPERATION DRIVING THE INPUT Transient Response Input Driver Considerations Single-Ended-to-Differential Op Amp Driver Common-Mode Level REFERENCE OPERATION DIGITAL INPUTS AND OUTPUTS DIGITAL OUTPUTS CS and Read Pins DAV Pin RESET Pin OTR Pin MODE OPERATION BIAS PIN OPERATION POWER DISSIPATION CONSIDERATIONS DIGITAL OUTPUT DRIVER CONSIDERATIONS (DRVDD) Clock Input and Considerations GROUNDING AND DECOUPLING Analog and Digital Grounding Analog and Digital Supply Decoupling EVALUATION BOARD GENERAL DESCRIPTION FEATURES AND USER CONTROLS Jumper Controlled Mode/OSR Selection Selectable Power Bias Data Interfacing Controls Buffered Output Data Jumper Controlled Reference Source Flexible DC or AC Coupled External Clock Inputs Flexible Input Signal Configuration Circuitry Selecting Single or Dual Signal Input Selectable Input Signal Common-Mode Level Source SHIPMENT CONFIGURATION QUICK SETUP APPLICATION INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE