Datasheet AD7888 (Analog Devices) - 3

AD7888–SPECIFICATIONS (VDD = 2.7 V to 5.25 V, REFIN/REFOUT = 2.5 V External/Internal Reference unless otherwise noted; fSCLK = 2 MHz (VDD = 2.7 V to 5.25 V); TA = TMIN to TMAX, unless otherwise noted.) Parameter A Version1 B Version1 Unit Test Condition/Comment
DYNAMIC PERFORMANCE Signal to Noise + Distortion Ratio2, 3 (SNR) 71 71 dB typ fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS Total Harmonic Distortion2 (THD) –80 –80 dB typ fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS Peak Harmonic or Spurious Noise2 –80 –80 dB typ fIN = 10 kHz Sine Wave, fSAMPLE = 125 kSPS Intermodulation Distortion2 (IMD) Second Order Terms –78 –78 dB typ fa = 9.983 kHz, fb = 10.05 kHz, fSAMPLE = 125 kSPS Third Order Terms –78 –78 dB typ fa = 9.983 kHz, fb = 10.05 kHz, fSAMPLE = 125 kSPS Channel-to-Channel Isolation2 –80 –80 dB typ fIN = 25 kHz Full Power Bandwidth 2.5 2.5 MHz typ @ 3 dB DC ACCURACY Any Channel Resolution 12 12 Bits Integral Nonlinearity2 ±2 ±1 LSB max Differential Nonlinearity2 ±2 –1/+1.5 LSB max Guaranteed No Missed Codes to 11 Bits (A Grade) Guaranteed No Missed Codes to 12 Bits (B Grade) Offset Error ±6 ±6 LSB max VDD = 4.75 V to 5.25 V (Typically ± 3 LSB) ±4.5 ±4.5 LSB max VDD = 2.7 V to 3.6 V (Typically ± 2 LSB) Offset Error Match2 2 2 LSB typ Gain Error2 ±2 ±2 LSB max Typically 30 LSB with Internal Reference Gain Error Match2 3 3 LSB max ANALOG INPUT Input Voltage Ranges 0 to VREF 0 to VREF Volts Leakage Current ±1 ±1 µA max Input Capacitance 38 38 pF typ When in Track 4 4 pF typ When in Hold REFERENCE INPUT/OUTPUT REFIN Input Voltage Range 2.5/VDD 2.5/VDD V min/max Functional from 1.2 V Input Impedance 5 5 kΩ typ Very High Impedance If Internal Reference Disabled REFOUT Output Voltage 2.45/2.55 2.45/2.55 V min/max REFOUT Tempco ±50 ±50 ppm/°C typ LOGIC INPUTS Input High Voltage, VINH 2.4 2.4 V min VDD = 4.75 V to 5.25 V 2.1 2.1 V min VDD = 2.7 V to 3.6 V Input Low Voltage, VINL 0.8 0.8 V max VDD = 2.7 V to 5.25 V Input Current, I ± IN 10 ±10 µA max Typically 10 nA, VIN = 0 V or VDD Input Capacitance, C 4 IN 10 10 pF max LOGIC OUTPUTS Output High Voltage, VOH ISOURCE = 200 µA VDD – 0.5 VDD – 0.5 V min VDD = 2.7 V to 5.25 V Output Low Voltage, VOL 0.4 0.4 V max ISINK = 200 µA Floating-State Leakage Current ±10 ±10 µA max Floating-State Output Capacitance5 10 10 pF max Output Coding Straight (Natural) Binary CONVERSION RATE Throughput Time 16 16 SCLK Cycles Conversion Time + Acquisition Time. 125 kSPS with 2 MHz Clock Track/Hold Acquisition Time2 1.5 1.5 SCLK Cycles Conversion Time 14.5 14.5 SCLK Cycles 7.25 µs (2 MHz Clock) –2– REV. C