Datasheet AD9054A (Analog Devices) - 6

AD9054A PIN FUNCTION DESCRIPTIONS PIN CONFIGURATION Pin Number Mnemonic Function
1 ENCODE Encode Clock for ADC (ADC
(MSB) 7 6 5 4
Samples on Rising Edge
VREF OUT GND VDD VDD GND VDD GND DB DB DB DB
of ENCODE) 2 ENCODE Encode Clock Complement
VREF IN DB
(ADC Samples on Falling Edge
3 GND DB
of ENCODE)
2 VDD DB1
3, 5, 15, 18, 28, VDD Power Supply (5 V)
GND DB0 (LSB)
30, 31, 36, 41
AIN VDD AD9054A
4, 6, 16, 17, 27, GND Ground
AIN TOP VIEW GND
29, 32, 35, 37, 40
(PINS DOWN) GND GND
14–7 DA0–DA7 Digital Outputs of ADC Channel
VDD VDD
A. DA7 is the MSB, DA0 the LSB
DEMUX DA0 (LSB)
19–26 DB0–DB7 Digital Outputs of ADC Channel
DS DA1
B. DB
PIN 1
7 is the MSB, DB0 the LSB
DS IDENTIFIER DA2
33 VREF OUT Internal Reference Output (2.5 V typical); Bypass with
6 5 4 3
0.1 µF to Ground
VDD GND VDD GND DA DA DA DA (MSB) 7
34 VREF IN Reference Input for ADC (2.5 V
ENCODE ENCODE DA
typical, ± 4%) 38 AIN Analog Input—Complement. Connect to input signal midscale reference. 39 AIN Analog Input—True 42 DEMUX Format Select. LOW = Dual. Channel Mode, HIGH = Single. Channel Mode (Channel A Only) 43 DS Data Sync Complement 44 DS Data Sync—Aligns Output Chan- nels in Dual-Channel Mode
SAMPLE N SAMPLE N+3 SAMPLE N+4 SAMPLE N–1 AIN SAMPLE N+1 SAMPLE N+2 tA tEH tEL 1/fS ENCODE ENCODE tPD tV D DATA N–5 DATA N–4 DATA N–3 DATA N–2 DATA N–1 DATA N 7–D0
Figure 1. Timing—Single Channel Mode REV. D –5–