Datasheet AD7899 (Analog Devices) - 9

AD7899 CONVERTER DETAILS
external CONVST signal and the track/hold actually going into The AD7899 is a high-speed, low-power, 14-bit A/D converter hold) is typically 15 ns and, more importantly, is well matched that operates from a single 5 V supply. The part contains a from device to device. It allows multiple AD7899s to sample 2.2 µs successive-approximation ADC, track/hold amplifier, an more than one channel simultaneously. At the end of a conversion, internal 2.5 V reference and a high-speed parallel interface. The the part returns to its tracking mode. The acquisition time of part accepts an analog input range of ±10 V or ±5 V (AD7899-1), the track/hold amplifier begins at this point. 0 V to 2.5 V or 0 V to 5 V (AD7899-2) and ±2.5 V (AD7899-3).
Reference Section
Overvoltage protection on the analog inputs for the part allows The AD7899 contains a single reference pin, labelled VREF, the input voltage to go to ± 18 V (AD7899-1 with ± 10 V input which either provides access to the part’s own 2.5 V reference or range), –9 V to +18 V (AD7899-1 with ± 5 V input range), –1 V allows an external 2.5 V reference to be connected to provide to +18 V (AD7899-2) and –4 V to +18 V (AD7899-3) without the reference source for the part. The part is specified with a causing damage. 2.5 V reference voltage. A conversion is initiated on the AD7899 by pulsing the CONVST To use the internal reference as the reference source for the input. On the rising edge of CONVST, the on-chip track/hold is AD7899, simply connect a 0.1 µF capacitor from the VREF pin placed into hold and the conversion is started. The BUSY/EOC to AGND. The voltage that appears at this pin is internally output signal is triggered high on the rising edge of CONVST buffered before being applied to the ADC. If this reference is and will remain high for the duration of the conversion sequence. required for use external to the AD7899, it should be buffered, The conversion clock for the part is generated internally using a as the part has a FET switch in series with the reference output laser-trimmed clock oscillator circuit. There is also the option of resulting in a source impedance for this output of 6 kΩ nominal. using an external clock. An external noncontinuous clock is applied The tolerance on the internal reference is ± 10 mV at 25°C with to the CLKIN pin. If, on the rising edge of CONVST, this input a typical temperature coefficient of 25 ppm/°C and a maximum is high, the external clock will be used. The external clock should error over temperature of ± 20 mV. not start until 100 ns after the rising edge of CONVST. The optimum throughput is obtained by using the internally gener- If the application requires a reference with a tighter tolerance or ated clock—see Using an External Clock. The BUSY/EOC signal the AD7899 needs to be used with a system reference, the user indicates the end of the conversion, and at this time the Track and has the option of connecting an external reference to this VREF Hold returns to tracking mode. The conversion results can be pin. The external reference will effectively overdrive the internal read at the end of the conversion (indicated by BUSY/EOC reference and thus provide the reference source for the ADC. going low) via a 14-bit parallel data bus with standard CS and RD The reference input is buffered before being applied to the ADC signals—see Timing and Control. with the maximum input current of ± 100 µA. Suitable reference sources for the AD7899 include the AD680, AD780, REF192, Conversion time for the AD7899 is 2.2 µs and the track/hold and REF43 precision 2.5 V references. acquisition time is 0.3 µs. To obtain optimum performance from the part, the read operation should not occur during a conversion
Analog Input Section
or during the 150 ns prior to the next CONVST rising edge. The AD7899 is offered as three part types, the AD7899-1 where This allows the part to operate at throughput rates up to 400 kHz the input can be configured for ± 10 V or a ± 5 V input voltage and achieve data sheet specifications. range, the AD7899-2 where the input can be configured for 0 V to 5 V or a 0 V to 2.5 V input voltage range and the AD7899-3
CIRCUIT DESCRIPTION
which handles input voltage range ± 2.5 V. The amount of current
Track/Hold Section
flowing into the analog input will depend on the analog input The track/hold amplifier on the AD7899 allows the ADCs to range and the analog input voltage. The maximum current flows accurately convert an input sine wave of full-scale amplitude to when negative full-scale is applied. 14-bit accuracy. The input bandwidth of the track/hold is greater
AD7899-1
than the Nyquist rate of the ADC even when the ADC is oper- Figure 2 shows the analog input section of the AD7899-1. The ated at its maximum throughput rate of 400 kSPS (i.e., the input can be configured for ± 5 V or ± 10 V operation on the track/hold can handle input frequencies in excess of 200 kHz). AD7899-1. For ± 5 V operation, the VINA and VINB inputs are The track/hold amplifier’s acquire input signals to 14-bit tied together and the input voltage is applied to both. For ± 10 V accuracy in less than 300 ns The operation of the track/hold is operation, the VINB input is tied to AGND and the input voltage essentially transparent to the user. The track/hold amplifier is applied to the VINA input. The VINA and VINB inputs are sym- samples the input channel on the rising edge of CONVST. The metrical and fully interchangeable. aperture time for the track/hold (i.e., the delay time between the –8– REV. A