Datasheet AD7709 (Analog Devices) - 5

AD7709 (continued) SPECIFICATIONS Parameter AD7709A, AD7709B Unit Test Conditions
EXCITATION CURRENT SOURCES (IEXC1, IEXC2, and IEXC3) Output Current IEXC1, IEXC2 200 mA nom IEXC3 25 mA nom Initial Tolerance at 25∞C ±10 % typ Drift 200 ppm/∞C typ Initial Current Matching at 25∞C ±2.5 % max B Grade, No Load (between IEXC1 and IEXC2) ±2.5 % typ A Grade, No Load Drift Matching (between IEXC1 and IEXC2) 20 ppm/∞C typ Initial Current Matching at 25∞C ±5 % max B Grade, No Load (between 8 ⫻ IEXC3 and IEXC1/IEXC2) ±5 % typ A Grade, No Load Drift Matching (between 8 ⫻ IEXC3 and IEXC1/IEXC2) 20 ppm/∞C typ Line Regulation VDD = 5 V ± 5% IEXC1, IEXC2 1.25 mA/V typ A, B Grades 2.6 mA/V max B Grade IEXC3 1 mA/V max B Grade 1 mA/V typ A Grade Load Regulation 300 nA/V typ Output Compliance VDD – 0.6 V max GND –30 mV V min LOW-SIDE POWER SWITCHES (SW1 and SW2) RON 3 W typ VDD = 5 V, A and B Grade 5 W max B Grade 4.5 W typ VDD = 3 V, A and B Grade 7 W max B Grade Allowable Current2 20 mA max Continuous Current per Switch LOGIC INPUTS All Inputs Except SCLK and XTAL12 VINL, Input Low Voltage 0.8 V max VDD = 5 V 0.4 V max VDD = 3 V VINH, Input High Voltage 2.0 V min VDD = 3 V or 5 V SCLK Only (Schmitt-Triggered Input)2 VT(+) 1.4/2 V min/V max VDD = 5 V VT(–) 0.8/1.4 V min/V max VDD = 5 V VT(+) – VT(–) 0.3/0.85 V min/V max VDD = 5 V VT(+) 0.95/2 V min/V max VDD = 3 V VT(–) 0.4/1.1 V min/V max VDD = 3 V VT(+) – VT(–) 0.3/0.85 V min/V max VDD = 3 V XTAL1 Only2 VINL, Input Low Voltage 0.8 V max VDD = 5 V VINH, Input High Voltage 3.5 V min VDD = 5 V VINL, Input Low Voltage 0.4 V max VDD = 3 V VINH, Input High Voltage 2.5 V min VDD = 3 V Input Currents (except XTAL) ±2 mA max VIN = VDD –70 mA max VIN = GND, Typically –40 mA @ 5 V and –20 mA at 3 V; Weak Pull-Ups on the Logic Inputs Input Capacitance 10 pF typ All Digital Inputs –4– REV. A Document Outline FEATURES INTERFACE POWER ON-CHIP FUNCTIONS APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics ADC CIRCUIT INFORMATION Overview Sigma-Delta ADC NOISE PERFORMANCE ON-CHIP REGISTERS Communications Register (A1, A0 = 0, 0) Status Register (A1, A0 = 0, 0; Power-On-Reset = 00H) Configuration Register (A1, A0 = 0, 1; Power-On-Reset = 000007H) Filter Register (A1, A0 = 1, 0; Power-On-Reset = 45h) ADC Data Result Register (A1, A0 = 1, 1; Power-On-Reset = 0000h CONFIGURING THE AD7709 DIGITAL INTERFACE MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7709-to-68HC11 Interface AD7709-to-8051 Interface AD7709-to-ADSP-2103/ADSP-2105 Interface CIRCUIT DESCRIPTION Analog Input Channels Programmable Gain Amplifier Bipolar/Unipolar Configuration Data Output Coding Excitation Currents Crystal Oscillator Reference Input Reset Input Power-Down Mode Grounding and Layout APPLICATIONS Pressure Measurement Temperature Measurement 3-Wire RTD Configurations Smart Transmitters OUTLINE DIMENSIONS Revision History